I see that there are problems with the EP terminal, which was generated as a perimeter pin, and the thermal pad being unbound. The project is HellzGate, but I can't mutate external components. I wonder if I can fix it by checking the part layout or submitting a quality issue. The pin placement seems incorrect too: the left row should have pins ordered as OUT 1, GATE 2, SOURCE 3, IN 4, while the right row has issues with UV and EP placements as well. This definitely needs attention!
Those pads indicate the TPS259830ONRGER, not the LTC4373. They must not both be GND:
IN_5 / Thermal Pad 1 → IN
GND_4 / Thermal Pad 2 → GND
TI specifies two electrically distinct exposed pads; shorting both to GND would directly short the input rail. The footprint naming may be awkward, but that separation is electrically required.
The complete qualification record, candidate comparison, worst-case threshold math, exact blockers and bench requirements were appended to the existing Job 1 Schematic Implementation Change Log, section Job 1D precision USB fail/restore supervisor qualification.
The existing LTC4416 E2/H2 threshold network remains unsafe and unchanged because neither TPS3700 nor the checked precision alternatives could be proven compliant with the presently unbounded U3 ripple/load transient, USB collapse slew, distribution/contact loss, U8 takeover transient and source-selector transition behavior.
Do not proceed to scanner-bank/load-shed implementation on the basis of USB_PRIMARY_VALID until the Job 1D proof blockers are closed.