Rev A Locked Architecture Details
Run AD5940 datasheet limits review only.
Do not modify schematic wiring.
Do not add components.
Do not change nets.
Review the AD5940 placeholder against datasheet/application-circuit requirements and identify what must be locked before PCB layout.
Check:
- Rail requirements:
- AVDD valid voltage range
- DVDD valid voltage range
- IOVDD / digital I/O rail requirement
- REG_1V8 role
- whether DVDD_AD5940 may remain tied to MCU_3V3: yes/no/uncertain
- whether separate 1.8 V rail placeholder is required: yes/no/uncertain
- SPI/logic compatibility:
- whether STM32L552 3.3 V SPI can directly connect to AD5940: yes/no/uncertain
- whether level shifting may be required: yes/no/uncertain
- BioZ/EIS pins:
- map placeholder nets to likely AD5940 pins/functions: AD5940_I_PLUS_PATH AD5940_I_MINUS_PATH AD5940_V_PLUS_PATH AD5940_V_MINUS_PATH AD5940_CURRENT_SENSE_P AD5940_CURRENT_SENSE_N AD5940_EXC_MON AD5940_AIN_MON
- Application-circuit blockers:
- required external references
- required RTIA/RLOAD/RCAL components
- required clock/crystal if any
- required decoupling not already represented
- required reset/interrupt/control pins
- Pre-layout decision: Choose one: A. Keep AD5940 as placeholder only B. Add separate 1.8 V LDO placeholder C. Add level-shifter placeholder only D. Split DVDD_AD5940 from MCU_3V3 E. Need human datasheet review before schematic changes
Report only:
- AD5940 rail blockers
- SPI/logic blockers
- missing application-circuit components
- recommended next schematic action
- whether current AD5940 section is safe for PCB layout: yes/no
Thought for 7 sec
I’ll run a read-only AD5940 datasheet-limits review against the current placeholder section, check rails, SPI logic, pin-role mapping, and application-circuit gaps, then report only the blockers and next action.
Worked for 1 min 10 sec
STOP
Sorry for the wait — almost done...
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Rev A Verification Status
Full schematic verification pass completed.
Status:
- Missing nets: none detected in requested skeleton.
- Duplicate labels: none detected in checked nets.
- Accidental shorts: none detected.
- Mux COM nets are separate.
- No COM-to-COM short found.
- Wrong mux mappings: none detected.
- IN0-IN7 = E1-E8.
- IN8-IN15 = CAL_OPEN, CAL_SHORT, CAL_100R, CAL_1K, CAL_10K, CAL_1K_PAR_10NF, CAL_10K_PAR_1NF, CAL_SERIES.
- Wrong component values: none detected in checked calibration and USB-CC parts.
- Power-rail conflicts: none detected.
- 5V_PROTECTED feeds separate digital and analog LDO placeholders.
- AVDD_AD5940 remains separate from DVDD_AD5940 / MCU_3V3.
Open issues:
- Major open DRC airwire set remains.
- Review shows approximately 241 airwire errors.
- ERC floating-pin warnings remain on intentionally uncommitted placeholder pins.
- Unused USB-C superspeed/SBU pins remain intentionally unused/placeheld.
- Schematic is ready for PCB-engineer datasheet review as a planning skeleton.
- Schematic is not manufacturing-ready until placeholder-pin ERC warnings are resolved/justified and board-level airwires are addressed.
Rules:
- Do not modify schematic wiring.
- Do not add components.
- Do not change nets.
