Rev A Locked Architecture Details
Run AD5940 datasheet limits review only.
Do not modify schematic wiring.
Do not add components.
Do not change nets.
Review the AD5940 placeholder against datasheet/application-circuit requirements and identify what must be locked before PCB layout.
Check:
- Rail requirements:
- AVDD valid voltage range
- DVDD valid voltage range
- IOVDD / digital I/O rail requirement
- REG_1V8 role
- whether DVDD_AD5940 may remain tied to MCU_3V3: yes/no/uncertain
- whether separate 1.8 V rail placeholder is required: yes/no/uncertain
- SPI/logic compatibility:
- whether STM32L552 3.3 V SPI can directly connect to AD5940: yes/no/uncertain
- whether level shifting may be required: yes/no/uncertain
- BioZ/EIS pins:
- map placeholder nets to likely AD5940 pins/functions: AD5940_I_PLUS_PATH AD5940_I_MINUS_PATH AD5940_V_PLUS_PATH AD5940_V_MINUS_PATH AD5940_CURRENT_SENSE_P AD5940_CURRENT_SENSE_N AD5940_EXC_MON AD5940_AIN_MON
- Application-circuit blockers:
- required external references
- required RTIA/RLOAD/RCAL components
- required clock/crystal if any
- required decoupling not already represented
- required reset/interrupt/control pins
- Pre-layout decision: Choose one: A. Keep AD5940 as placeholder only B. Add separate 1.8 V LDO placeholder C. Add level-shifter placeholder only D. Split DVDD_AD5940 from MCU_3V3 E. Need human datasheet review before schematic changes
Report only:
- AD5940 rail blockers
- SPI/logic blockers
- missing application-circuit components
- recommended next schematic action
- whether current AD5940 section is safe for PCB layout: yes/no
Thought for 7 sec
I’ll run a read-only AD5940 datasheet-limits review against the current placeholder section, check rails, SPI logic, pin-role mapping, and application-circuit gaps, then report only the blockers and next action.
Worked for 1 min 10 sec
STOP
Sorry for the wait — almost done...
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Power Tree Architecture
EchoS Bank Rev A power architecture:
USB_VBUS from J_USB_C feeds input protection first.
Power path:
USB_VBUS → input fuse / current limit / reverse protection → 5V_PROTECTED
From 5V_PROTECTED:
- Low-noise analog LDO → AVDD_AD5940
- Digital LDO → MCU_3V3
- Digital/IO rail → DVDD_AD5940
- Quiet mux positive rail → MUX_VDD
- Optional negative rail / charge pump / inverter → MUX_VSS if required after AD5940 signal-range review
Ground strategy:
- Use AGND for analog/mux/calibration region.
- Use DGND for MCU/USB digital region.
- Do not split the physical ground plane under sensitive analog paths unless reviewed.
- Keep USB/digital return currents away from AD5940 HSTIA, sense, calibration, and mux area.
- Final star/plane strategy requires analog PCB engineer review.
Rules:
- Do not add regulator components yet.
- Do not choose final regulator MPNs yet.
- Do not modify USB wiring.
- Do not modify AD5940, MCU, muxes, electrode dock, or calibration bank.
