Rev A Locked Architecture Details


Run AD5940 datasheet limits review only.
Do not modify schematic wiring. Do not add components. Do not change nets.
Review the AD5940 placeholder against datasheet/application-circuit requirements and identify what must be locked before PCB layout.
Check:
  1. Rail requirements:
  • AVDD valid voltage range
  • DVDD valid voltage range
  • IOVDD / digital I/O rail requirement
  • REG_1V8 role
  • whether DVDD_AD5940 may remain tied to MCU_3V3: yes/no/uncertain
  • whether separate 1.8 V rail placeholder is required: yes/no/uncertain
  1. SPI/logic compatibility:
  • whether STM32L552 3.3 V SPI can directly connect to AD5940: yes/no/uncertain
  • whether level shifting may be required: yes/no/uncertain
  1. BioZ/EIS pins:
  • map placeholder nets to likely AD5940 pins/functions: AD5940_I_PLUS_PATH AD5940_I_MINUS_PATH AD5940_V_PLUS_PATH AD5940_V_MINUS_PATH AD5940_CURRENT_SENSE_P AD5940_CURRENT_SENSE_N AD5940_EXC_MON AD5940_AIN_MON
  1. Application-circuit blockers:
  • required external references
  • required RTIA/RLOAD/RCAL components
  • required clock/crystal if any
  • required decoupling not already represented
  • required reset/interrupt/control pins
  1. Pre-layout decision: Choose one: A. Keep AD5940 as placeholder only B. Add separate 1.8 V LDO placeholder C. Add level-shifter placeholder only D. Split DVDD_AD5940 from MCU_3V3 E. Need human datasheet review before schematic changes
Report only:
  • AD5940 rail blockers
  • SPI/logic blockers
  • missing application-circuit components
  • recommended next schematic action
  • whether current AD5940 section is safe for PCB layout: yes/no
I’ll run a read-only AD5940 datasheet-limits review against the current placeholder section, check rails, SPI logic, pin-role mapping, and application-circuit gaps, then report only the blockers and next action.
STOP

Checking a few things...


Mux Supply Rail Decision Pending
MUX_VDD and MUX_VSS are not final production-locked yet.
Current mux working candidate: ADG1406-family 16:1 analog muxes.
Mux supply strategy must be reviewed against:
  • AD5940 excitation/sense voltage range
  • expected electrode/phantom common-mode range
  • need for bipolar signal swing
  • switch Ron versus supply voltage
  • leakage and capacitance behavior
  • phase stability from 1 kHz to 500 kHz
  • safety and USB-powered bench operation
Planning rails:
  • MUX_VDD = quiet analog-positive mux rail
  • MUX_VSS = mux negative rail or analog ground reference, pending final review
  • AGND = mux ground/reference region
Default Rev A planning assumption: Keep MUX_VDD and MUX_VSS as separate named rails for now. Do not tie MUX_VSS to AGND until AD5940 signal-range review is complete. Do not add charge pump or inverter yet.
Rules:
  • Do not modify mux power wiring yet.
  • Do not add regulators.
  • Do not add charge pump.
  • Do not modify AD5940, MCU, USB, electrode dock, or calibration bank.