Rev A Locked Architecture Details
Run AD5940 datasheet limits review only.
Do not modify schematic wiring.
Do not add components.
Do not change nets.
Review the AD5940 placeholder against datasheet/application-circuit requirements and identify what must be locked before PCB layout.
Check:
- Rail requirements:
- AVDD valid voltage range
- DVDD valid voltage range
- IOVDD / digital I/O rail requirement
- REG_1V8 role
- whether DVDD_AD5940 may remain tied to MCU_3V3: yes/no/uncertain
- whether separate 1.8 V rail placeholder is required: yes/no/uncertain
- SPI/logic compatibility:
- whether STM32L552 3.3 V SPI can directly connect to AD5940: yes/no/uncertain
- whether level shifting may be required: yes/no/uncertain
- BioZ/EIS pins:
- map placeholder nets to likely AD5940 pins/functions: AD5940_I_PLUS_PATH AD5940_I_MINUS_PATH AD5940_V_PLUS_PATH AD5940_V_MINUS_PATH AD5940_CURRENT_SENSE_P AD5940_CURRENT_SENSE_N AD5940_EXC_MON AD5940_AIN_MON
- Application-circuit blockers:
- required external references
- required RTIA/RLOAD/RCAL components
- required clock/crystal if any
- required decoupling not already represented
- required reset/interrupt/control pins
- Pre-layout decision: Choose one: A. Keep AD5940 as placeholder only B. Add separate 1.8 V LDO placeholder C. Add level-shifter placeholder only D. Split DVDD_AD5940 from MCU_3V3 E. Need human datasheet review before schematic changes
Report only:
- AD5940 rail blockers
- SPI/logic blockers
- missing application-circuit components
- recommended next schematic action
- whether current AD5940 section is safe for PCB layout: yes/no
Thought for 7 sec
I’ll run a read-only AD5940 datasheet-limits review against the current placeholder section, check rails, SPI logic, pin-role mapping, and application-circuit gaps, then report only the blockers and next action.
Worked for 1 min 10 sec
STOP
Weighing a few options...
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Resolved Bring-Up Blockers
Resolved bring-up blockers:
-
STM32 BOOT0 handling added.
- MCU_BOOT0 exists.
- R_MCU_BOOT0_PD = 10 kΩ to DGND.
- TP_MCU_BOOT0 exists.
- BOOT0 is not floating.
-
STM32 NRST filter added.
- C_MCU_NRST_100NF exists.
- C_MCU_NRST_100NF connects MCU_NRST to DGND.
- MCU_NRST remains separate from AD5940_RST_N.
-
USB VBUS sense protection placeholder added.
- U_VBUS_SENSE_PROTECTION exists.
- USB_VBUS feeds U_VBUS_SENSE_PROTECTION input.
- MCU_USB_VBUS_SENSE_PROTECTED exists.
- MCU USB_VBUS_SENSE uses protected/divided placeholder path.
- Raw USB_VBUS no longer directly feeds MCU USB_VBUS_SENSE as the only path.
Remaining unresolved pre-layout blockers:
- MUX_VSS / mux supply strategy.
- AD5940 rail strategy: AVDD, DVDD, IOVDD, and MCU logic-level compatibility.
- STM32L552 package and USB clock source.
- ADG1406 Ron versus calibration accuracy.
- Final MPNs and datasheet-verified footprints.
