Rev A Locked Architecture Details

Run AD5940 datasheet limits review only.
Do not modify schematic wiring. Do not add components. Do not change nets.
Review the AD5940 placeholder against datasheet/application-circuit requirements and identify what must be locked before PCB layout.
Check:
  1. Rail requirements:
  • AVDD valid voltage range
  • DVDD valid voltage range
  • IOVDD / digital I/O rail requirement
  • REG_1V8 role
  • whether DVDD_AD5940 may remain tied to MCU_3V3: yes/no/uncertain
  • whether separate 1.8 V rail placeholder is required: yes/no/uncertain
  1. SPI/logic compatibility:
  • whether STM32L552 3.3 V SPI can directly connect to AD5940: yes/no/uncertain
  • whether level shifting may be required: yes/no/uncertain
  1. BioZ/EIS pins:
  • map placeholder nets to likely AD5940 pins/functions: AD5940_I_PLUS_PATH AD5940_I_MINUS_PATH AD5940_V_PLUS_PATH AD5940_V_MINUS_PATH AD5940_CURRENT_SENSE_P AD5940_CURRENT_SENSE_N AD5940_EXC_MON AD5940_AIN_MON
  1. Application-circuit blockers:
  • required external references
  • required RTIA/RLOAD/RCAL components
  • required clock/crystal if any
  • required decoupling not already represented
  • required reset/interrupt/control pins
  1. Pre-layout decision: Choose one: A. Keep AD5940 as placeholder only B. Add separate 1.8 V LDO placeholder C. Add level-shifter placeholder only D. Split DVDD_AD5940 from MCU_3V3 E. Need human datasheet review before schematic changes
Report only:
  • AD5940 rail blockers
  • SPI/logic blockers
  • missing application-circuit components
  • recommended next schematic action
  • whether current AD5940 section is safe for PCB layout: yes/no
I’ll run a read-only AD5940 datasheet-limits review against the current placeholder section, check rails, SPI logic, pin-role mapping, and application-circuit gaps, then report only the blockers and next action.
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J_ELECTRODE_DOCK Pin Table
J_ELECTRODE_DOCK is the premium front-panel electrode/phantom dock placeholder.
Connector class: Premium keyed medical/test-grade push-pull circular connector, LEMO/REDEL or equivalent. Do not use cheap screw terminal as the primary connector.
Pin table: 1 E1 2 E1_GUARD 3 E1_SHIELD_AGND 4 E2 5 E2_GUARD 6 E2_SHIELD_AGND 7 E3 8 E3_GUARD 9 E3_SHIELD_AGND 10 E4 11 E4_GUARD 12 E4_SHIELD_AGND 13 E5 14 E5_GUARD 15 E5_SHIELD_AGND 16 E6 17 E6_GUARD 18 E6_SHIELD_AGND 19 E7 20 E7_GUARD 21 E7_SHIELD_AGND 22 E8 23 E8_GUARD 24 E8_SHIELD_AGND 25 CAL_COM_SHIELD_AGND 26 GUARD_DRV_COMMON
Rules:
  • CAL_COM itself is internal and is not exposed as an electrode pin.
  • E1-E8 are live external electrode inputs.
  • Each electrode supports signal, guard, and shield.
  • Guard/shield behavior will be defined later.
  • Final connector manufacturer part number is not locked yet.
  • Do not modify schematic wiring.
  • Do not add new components.