Manufacturing Design Checklist
bruh you didn't even wire it together and created more issues
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Worked for 1 min 3 sec
You’re right. I checked history: the bad work is exactly 8 routing commits from my last pass, and they can be cleanly reverted without touching your earlier manual move or the C1/property fixes.
Safe recovery point:
- Revert to commit #bd42c4c0
- This removes only the 8 bad
mutate_layout_routeedits. - It preserves your prior layout changes and the C1 footprint/property work.
I will not do anything else unless you approve. If you want me to undo the damage, say:
Revert to #bd42c4c0
Revert bad routes
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Revert and run DRC
Protect current state
Manual routing plan
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Power Budget and PoE Module Selection
Prototype Measurement Update — 2026-07-04
User reported a working prototype using a ZhiPu 95W IEEE 802.3bt splitter feeding a 24V Philips Hue Perifo track lighting rail. The measured sustained PoE load is 72.21W from a UniFi USW Pro XG 48 PoE switch while powering four cylinder spotlights plus two gradient light bars simultaneously. The switch reports stable PoE+++ negotiation and splitter thermal performance is nominal at full load.
Implication for the integrated PCB: the selected Silvertel AG59824-LPB remains appropriate for the production-headroom target, but the design should preserve thermal margin and validate the full 24V lighting load under worst-case enclosure/ambient conditions before manufacturing release.
Decision
The 24V rail is now a production-headroom rail, not just a measured-load rail. The user selected a 2–3A target at 24V.
Load Basis
- Measured load: 22.90W at 24V.
- Measured current: 22.90W / 24V = 0.954A.
- Production target: 24V at 2–3A.
- Practical PoE module target: 60W class minimum.
Existing Module Status
- Existing schematic module: Silvertel Ag5324.
- Existing capability: approximately 24V at 1.25A / 30W-class, with less continuous margin depending on thermal and PoE limits.
- Status: acceptable only as a controlled prototype at the measured load; not acceptable for the selected 2–3A target.
Leading Candidate for True 3A Headroom
- Candidate: Silvertel AG59824-LPB.
- Type: IEEE 802.3bt Class 8 PoE++ isolated PD module.
- Output: 24V nominal.
- Rating: 89W-class; distributor data lists 24V at up to about 4.2A.
- Why selected: it covers a 3A rail target with practical margin, unlike 60W modules that cap around 2.5A at 24V.
- Mechanical: SMT/open-frame module, approximately 51mm x 30mm x 15mm.
- Thermal: high-power PoE operation requires careful copper, airflow/enclosure conduction, and derating review.
Lower-Power Fallback Candidate
- Candidate: Silvertel Ag5810.
- Type: IEEE 802.3bt Type 4 Class 7 PD module.
- Output: configurable 12V/24V isolated output.
- 24V mode: series output configuration.
- Rating: 60W maximum; 24V series output supports up to about 2.5A, limited by 60W.
- Use only if the product requirement is intentionally capped below 3A.
Required Design Changes
- DONE: Created an AG59824-LPB Flux component from datasheet-backed pinout data.
- DONE: Replaced PS1 Ag5324 with AG59824-LPB.
- DONE: Rewired VIN+/VIN− and +VDC/−VDC, left ADJ open for nominal 24V, and marked TYP2/TYP3 detect outputs no-connect for now.
- DONE: Updated AG59824 output capacitors to 470uF bulk plus 100nF and 10uF ceramics, and added 10nF across VIN+/VIN−.
- DONE: Replaced the 1.5A output PTC with a 3A/24V resettable fuse.
- DONE: Replaced the two DF01S PoE diode bridges with an LT4321 active PoE bridge controller plus eight 100V BSC040N10NS5 N-MOSFETs.
- DONE: Replaced the SS56 Schottky output reverse-protection diode with an LTC4359 ideal-diode controller plus DMT6008LFG N-MOSFET.
- DONE: Rechecked the 24V-to-3.3V LMR33630 buck values and upgraded the 3.3V output capacitor bank to 4 × 22uF, 16V, 1210 ceramics per the datasheet-style 400kHz design.
- DONE: Rechecked the low-side PWM MOSFET at 3A; DMT6008LFG dissipation is acceptable on paper at 3.3V gate drive, but layout/gate-drive/clamp validation remains required.
Production Power-Stage Verification Notes
- PoE input rectification: LT4321 + eight 100V MOSFETs replaces the lossy DF01S bridges. This is the preferred Class 8 PoE approach because passive bridge losses can be multiple watts at high power.
- PoE MOSFETs: BSC040N10NS5ATMA1 is 100V and about 4mΩ max at VGS=10V; final layout must keep all LT4321/MOSFET gate/source/drain loops tight and thermally symmetric.
- LT4321 local bypass: C36 is 100nF / 100V across OUTP/OUTN. Existing D1 remains the rectified PoE input TVS. Do not add large pre-classification capacitance unless the AG59824/LT4321/Silvertel application note allows it.
- 24V output reverse protection: LTC4359 + Q10 replaces the SS56 Schottky. At 3A, Q10 conduction loss is expected to be roughly 3A² × RDS(on), far below the previous Schottky's ~1–2W loss.
- 3.3V buck: LMR33630ADDA supports 3.8–36V input and 3A output. The project budget remains 0.25A typical / 0.5A peak on 3V3, so the 24V input-current impact is small. C2 was upsized physically for DC-bias margin, and C6–C9 now match the datasheet-style 1210 output capacitor bank.
- Low-side lighting MOSFET: Q1 DMT6008LFG is acceptable on paper for 3A PWM with 3.3V gate drive; at VGS=3V the datasheet gives about 19mΩ typical, or roughly 0.17W at 3A. Final validation still needs PWM frequency, gate edge-rate/EMI, cable inductance, and thermal copper review.
Open Risk
AG59824-LPB was created as a project-owned Flux component from the Silvertel datasheet. Its schematic pinout is available, but the exact LPB SMT land pattern and 3D model still need footprint verification before PCB layout release.
Additional open risks after production power-stage cleanup:
- IEEE 802.3bt Class 8 practical continuous load should still be treated as about 2.5–3A at 24V unless the PSE, cable length, thermal design, and Silvertel operating conditions are controlled.
- LT4321 and AG59824 footprints need mechanical/land-pattern verification before placement/routing.
- Output ideal-diode protection should be reviewed against the exact installer-abuse case: reverse-connected passive load, externally powered reverse polarity, shorted output, and hot-plug/inrush are different faults.
- The 24V terminal block, copper widths, thermal vias, and enclosure heat path still need PCB-level verification for 3A continuous operation.
Prototype Measurement Update — 2026-07-04
Decision
Load Basis
Existing Module Status
Leading Candidate for True 3A Headroom
Lower-Power Fallback Candidate
Required Design Changes
Production Power-Stage Verification Notes
Open Risk
