Manufacturing Design Checklist


I had to stop because the account has no available ACUs, so AI tool execution is unavailable right now.
What I completed this session:
  • Ran routing pre-check; broad autoroute is not safe yet due to blocked pins and track-width warnings.
  • Routed several targeted power paths:
    • PS1 +VDC → C1 P1 on ISO_24V
    • C1 P1 → F1 P1 on ISO_24V
    • F1 P2 → Q10 source on 24V_FUSED
    • Q10 drain → J2 pin 1 on 24V_OUT
    • Q1 source → C1 P2 on ISO_GND
    • F1 P2 → U5 IN
    • C1 P1 → U1 VIN
    • U1 VIN → U1 EN
Open items:
  • I could not run the final post-route DRC due to ACUs running out.
  • These routes failed and still need attention:
    • J2 pin 2 → Q1 drain LED switched return
    • U5 OUT → Q10 drain
    • Q10 gate → U5 GATE
Suggested next steps:
  1. Add ACUs, then run one DRC check.
  2. Manually inspect Q1/Q10/U5 local placement and copper clearance.
  3. Route the three failed local connections surgically before any broader routing.
bruh you didn't even wire it together and created more issues

Screenshot 2026-07-04 at 4.41.38 PM.png

You’re right. I checked history: the bad work is exactly 8 routing commits from my last pass, and they can be cleanly reverted without touching your earlier manual move or the C1/property fixes.
Safe recovery point:
  • Revert to commit #bd42c4c0
  • This removes only the 8 bad mutate_layout_route edits.
  • It preserves your prior layout changes and the C1 footprint/property work.
I will not do anything else unless you approve. If you want me to undo the damage, say:
Revert to #bd42c4c0
Revert bad routes
Show route diff
Revert and run DRC
Protect current state
Manual routing plan

J2
Q3
Q4
Q7
U5
Q5
Q2
Q9
Q8
U3
PS1
Q6
U5 IN - U5 SOURCE
BR1 + - BR2 +
BR1 + - BR2 +
R13 P2 - R14 P1
PS1 0V1_1 - PS1 0V1_2
U2 PA8 - R15 P1
BR3 AC - D4 1
U4 IN45 - Q6 S_1
Q4 S_3 - Q5 D_1
U2 PB8 - R5 P1
PS1 0V1_1 - PS1 0V1_2
PS1 0V1_1 - PS1 0V1_2
U3 ~RST - R10 P2
BR1 + - BR2 +
PS1 OUT1_1 - PS1 OUT1_2
U2 VDD - C10 P1
Q3 S_3 - Q5 S_1
U2 VDD - C10 P1
PS1 0V1_1 - PS1 0V1_2
U2 PA5 - U3 SCLK
U3 PMODE0 - R9 P2
R1 P2 - R2 P1
U2 VDD - C10 P1
U4 TG36 - Q4 G
PS1 0V1_1 - PS1 0V1_2
U4 ~EN~ - Q2 D_1
PS1 OUT1_1 - PS1 OUT1_2
Q2 S_3 - Q3 D_1
PS1 0V1_1 - PS1 0V1_2
Q2 D_5 - Q4 D_1
U2 VDD - C10 P1
PS1 OUT1_1 - PS1 OUT1_2
PS1 0V1_1 - PS1 0V1_2
Q7 S_3 - Q9 S_1
U4 OUTN - Q3 S_1
U2 PA7 - U3 MOSI
U3 XO - Y1 P2
Q6 D_5 - Q8 D_1
R15 P2 - R16 P1
U2 PA6 - U3 MISO
U3 TOCAP - C28 P1
U5 GATE - Q10 G
U3 RXN - J1 RD-
PS1 0V1_1 - PS1 0V1_2
U2 PC7 - J3 SDA
U4 BG78 - Q9 G
U3 TOCAP - C28 P1
U2 VDD - C10 P1
U5 OUT - Q10 D
PS1 0V1_1 - PS1 0V1_2
PS1 0V1_1 - PS1 0V1_2
PS1 0V1_1 - PS1 0V1_2
Q2 S_3 - Q3 D_1
U2 VDD - C10 P1
R15 P2 - R16 P1
PS1 0V1_1 - PS1 0V1_2
U3 ~RST - R10 P2
PS1 0V1_1 - PS1 0V1_2
J5 Pin_4 - U2 PA14
U4 TG45 - Q6 G
U2 VDD - C10 P1
J1 VC+_2 - BR2 AC
U4 BG45 - Q7 G
U4 IN78 - Q8 S_1
BR3 AC - D4 2
J2 ~ - Q1 D
U3 PMODE2 - R7 P2
PS1 0V1_1 - PS1 0V1_2
U2 VDD - C10 P1
PS1 OUT1_1 - PS1 OUT1_2
U3 XI/CLKIN - Y1 P1
U5 GATE - Q10 G
U3 ~RST - R10 P2
PS1 0V1_1 - PS1 0V1_2
U4 BG36 - Q5 G
BR1 - - BR2 -
PS1 0V1_1 - PS1 0V1_2
PS1 0V1_1 - PS1 0V1_2
J1 RCT - BR1 AC
U2 PC7 - J3 SDA
U2 VDD - C10 P1
U1 BOOT - C4 P1
F1 P2 - D2 A
U4 TG45 - Q6 G
U2 VDD - C10 P1
U2 VDD - C10 P1
U2 VDD - C10 P1
BR3 AC - D4 2
R15 P2 - R16 P1
U4 OUTP - U4 EN
U2 VDD - C10 P1
J5 Pin_4 - U2 PA14
PS1 0V1_1 - PS1 0V1_2
PS1 0V1_1 - PS1 0V1_2
PS1 0V1_1 - PS1 0V1_2
Q8 S_3 - Q9 D_1
U2 VDD - C10 P1
U2 PA3 - U3 ~INT
U2 VDD - C10 P1
U1 PG - R3 P1
PS1 0V1_1 - PS1 0V1_2
R1 P2 - R2 P1
U2 VDD - C10 P1
U2 VDD - C10 P1
U2 VDD - C10 P1
U4 TG12 - Q2 G
J5 Pin_5 - U2 PG10
U3 XO - Y1 P2
U4 BG78 - Q9 G
J5 Pin_2 - U2 PA13
R6 P2 - U3 RSVD
PS1 0V1_1 - PS1 0V1_2
Q5 S_3 - Q7 S_1
PS1 0V1_1 - PS1 0V1_2
U1 SW - C4 P2
J5 Pin_5 - U2 PG10
U3 TXP - J1 TD+
U3 PMODE1 - R8 P2
U2 VDD - C10 P1
U2 VDD - C10 P1
U1 EN - C2 P1
PS1 0V1_1 - PS1 0V1_2
U2 VDD - C10 P1
U2 VDD - C10 P1
J1 VC-_2 - BR2 AC
J1 VC-_2 - BR2 AC
U3 1V2O - C29 P1
J4 Pin_3 - R13 P1
U2 VDD - C10 P1
PS1 0V1_1 - PS1 0V1_2
U3 PMODE0 - R9 P2
U3 TXP - J1 TD+
PS1 OUT1_1 - PS1 OUT1_2
U3 RXN - J1 RD-
Q4 S_3 - Q5 D_1
R6 P2 - U3 RSVD
U2 VDD - C10 P1
BR1 - - BR2 -
U4 BG45 - Q7 G
U2 VDD - C10 P1
J5 Pin_5 - U2 PG10
U3 RXP - J1 RD+
U2 VDD - C10 P1
Q5 S_3 - Q7 S_1
U4 TG78 - Q8 G
U2 VDD - C10 P1
BR1 + - BR2 +
J1 VC+_2 - BR2 AC
F1 P2 - D2 A
BR3 AC - D4 2
U2 PA3 - U3 ~INT
PS1 0V1_1 - PS1 0V1_2
Q3 S_3 - Q5 S_1
U3 EXRES1 - R6 P1
U3 1V2O - C29 P1
PS1 0V1_1 - PS1 0V1_2
U1 VCC - C5 P1
U4 TG36 - Q4 G
U5 OUT - Q10 D
U2 PA7 - U3 MOSI
U3 PMODE1 - R8 P2
PS1 0V1_1 - PS1 0V1_2
U2 VDD - C10 P1
U2 VDD - C10 P1
U5 IN - U5 SOURCE
U2 VDD - C10 P1
U4 TG78 - Q8 G
BR3 AC - D4 1
PS1 0V1_1 - PS1 0V1_2
PS1 0V1_1 - PS1 0V1_2
U4 IN45 - Q6 S_1
U4 IN36 - Q4 S_1
U2 PA8 - R15 P1
Q4 D_5 - Q6 D_1
R13 P2 - R14 P1
PS1 0V1_1 - PS1 0V1_2
PS1 0V1_1 - PS1 0V1_2
U2 VDD - C10 P1
PS1 0V1_1 - PS1 0V1_2
U2 VDD - C10 P1
Q7 S_3 - Q9 S_1
U5 OUT - Q10 D
U2 PA4 - U3 ~SCS
U4 ~EN~ - Q2 D_1
U5 IN - U5 SOURCE
U1 BOOT - C4 P1
U5 IN - U5 SOURCE
J4 Pin_3 - R13 P1
BR1 + - BR2 +
PS1 0V1_1 - PS1 0V1_2
U4 BG12 - Q3 G
U1 SW - C4 P2
U3 RXP - J1 RD+
PS1 0V1_1 - PS1 0V1_2
U1 VCC - C5 P1
U2 PC6 - J3 SCL
PS1 0V1_1 - PS1 0V1_2
U4 IN78 - Q8 S_1
Q8 S_3 - Q9 D_1
U1 EN - C2 P1
J2 ~ - Q1 D
U2 VDD - C10 P1
J5 Pin_6 - U2 PB3
PS1 0V1_1 - PS1 0V1_2
Q6 S_3 - Q7 D_1
U2 VDD - C10 P1
U4 OUTP - U4 EN
PS1 0V1_1 - PS1 0V1_2
U2 VDD - C10 P1
U5 OUT - Q10 D
Q6 S_3 - Q7 D_1
U2 VDD - C10 P1
U4 OUTN - Q3 S_1
J1 TCT - BR1 AC
U1 SW - C4 P2
U2 VDD - C10 P1
PS1 0V1_1 - PS1 0V1_2
BR1 - - BR2 -
U2 VDD - C10 P1
U2 PB8 - R5 P1
U2 VDD - C10 P1
PS1 0V1_1 - PS1 0V1_2
PS1 0V1_1 - PS1 0V1_2
U3 XI/CLKIN - Y1 P1
U1 PG - R3 P1
U2 PC6 - J3 SCL
BR1 - - BR2 -
BR1 - - BR2 -
PS1 0V1_1 - PS1 0V1_2
U2 PC6 - J3 SCL
PS1 0V1_1 - PS1 0V1_2
U2 PA5 - U3 SCLK
J5 Pin_2 - U2 PA13
PS1 0V1_1 - PS1 0V1_2
U2 VDD - C10 P1
U3 XI/CLKIN - Y1 P1
PS1 0V1_1 - PS1 0V1_2
J5 Pin_5 - U2 PG10
PS1 0V1_1 - PS1 0V1_2
U4 IN12 - Q2 S_1
U4 BG36 - Q5 G
J5 Pin_6 - U2 PB3
U2 VDD - C10 P1
U3 XO - Y1 P2
U2 PC7 - J3 SDA
PS1 0V1_1 - PS1 0V1_2
BR3 AC - D4 1
R13 P2 - R14 P1
R1 P2 - R2 P1
PS1 0V1_1 - PS1 0V1_2
PS1 0V1_1 - PS1 0V1_2
U2 VDD - C10 P1
R13 P2 - R14 P1
Q6 D_5 - Q8 D_1
U4 IN12 - Q2 S_1
U2 VDD - C10 P1
U2 VDD - C10 P1
U2 PA6 - U3 MISO
U4 BG12 - Q3 G
U2 PA4 - U3 ~SCS
PS1 0V1_1 - PS1 0V1_2
U3 PMODE2 - R7 P2
U2 VDD - C10 P1
U5 OUT - Q10 D
Q2 D_5 - Q4 D_1
U3 TXN - J1 TD-
PS1 0V1_1 - PS1 0V1_2
Q4 D_5 - Q6 D_1
U2 VDD - C10 P1
U4 TG12 - Q2 G
J1 RCT - BR1 AC
J1 TCT - BR1 AC
U3 EXRES1 - R6 P1
PS1 0V1_1 - PS1 0V1_2
U2 VDD - C10 P1
PS1 OUT1_1 - PS1 OUT1_2
U3 TXN - J1 TD-
U1 EN - C2 P1
U4 IN36 - Q4 S_1
U2 VDD - C10 P1
R15
Resistance
33Ω
C6
End of Life
Capacitance
22uF
R11
Resistance
4.7kΩ
R16
Resistance
100kΩ
C7
End of Life
Capacitance
22uF
C28
Capacitance
4.7uF
C12
Capacitance
100nF
C10
Capacitance
100nF
C35
Capacitance
10nF
C2
Capacitance
10uF
C5
Capacitance
1uF
C19
Capacitance
1uF
C15
Capacitance
4.7uF
C3
Capacitance
220nF
R14
Resistance
100kΩ
C27
Capacitance
10uF
C18
Capacitance
100nF
R3
Resistance
100kΩ
C11
Capacitance
100nF
R12
Resistance
4.7kΩ
C20
Capacitance
100nF
R2
Resistance
43.2kΩ
R4
Resistance
10kΩ
C31
Capacitance
27pF
C26
Capacitance
100nF
R1
Resistance
100kΩ
C17
Capacitance
1uF
C22
Capacitance
100nF
C29
Capacitance
10nF
C37
Capacitance
1.5uF
C14
Capacitance
100nF
C36
Capacitance
100nF
C1
Capacitance
470uF
C34
Capacitance
10uF
C13
Capacitance
100nF
C30
Capacitance
27pF
R9
Resistance
10kΩ
R6
Resistance
12.4kΩ
C8
End of Life
Capacitance
22uF
R5
Resistance
10kΩ
R10
Resistance
10kΩ
C9
End of Life
Capacitance
22uF
C25
Capacitance
100nF
C24
Capacitance
100nF
R13
Resistance
1kΩ
C32
Capacitance
100nF
C4
Capacitance
100nF
C16
Capacitance
10nF
C23
Capacitance
100nF
R7
Resistance
10kΩ
C21
Capacitance
100nF
R8
Resistance
10kΩ
C33
Capacitance
100nF
BR3
U1
L1
Inductance
6.8uH
U4
F1
D4
U2
J5
D1
J3
Y1
J1
Q10
J4
D3
Q1

PoE Lighting Controller

PoE Lighting Controller thumbnail