Manufacturing Design Checklist

bruh you didn't even wire it together and created more issues
Screenshot 2026-07-04 at 4.41.38 PM.png

Image

You’re right. I checked history: the bad work is exactly 8 routing commits from my last pass, and they can be cleanly reverted without touching your earlier manual move or the C1/property fixes.
Safe recovery point:
  • Revert to commit #bd42c4c0
  • This removes only the 8 bad mutate_layout_route edits.
  • It preserves your prior layout changes and the C1 footprint/property work.
I will not do anything else unless you approve. If you want me to undo the damage, say:
Revert to #bd42c4c0
Revert bad routes
Show route diff
Revert and run DRC
Protect current state
Manual routing plan
J2
Q3
Q4
Q7
U5
Q5
Q2
Q9
Q8
U3
PS1
Q6
U5 IN - U5 SOURCE
BR1 + - BR2 +
BR1 + - BR2 +
R13 P2 - R14 P1
PS1 0V1_1 - PS1 0V1_2
U2 PA8 - R15 P1
BR3 AC - D4 1
U4 IN45 - Q6 S_1
Q4 S_3 - Q5 D_1
U2 PB8 - R5 P1
PS1 0V1_1 - PS1 0V1_2
PS1 0V1_1 - PS1 0V1_2
U3 ~RST - R10 P2
BR1 + - BR2 +
PS1 OUT1_1 - PS1 OUT1_2
U2 VDD - C10 P1
Q3 S_3 - Q5 S_1
U2 VDD - C10 P1
PS1 0V1_1 - PS1 0V1_2
U2 PA5 - U3 SCLK
U3 PMODE0 - R9 P2
R1 P2 - R2 P1
U2 VDD - C10 P1
U4 TG36 - Q4 G
PS1 0V1_1 - PS1 0V1_2
U4 ~EN~ - Q2 D_1
PS1 OUT1_1 - PS1 OUT1_2
Q2 S_3 - Q3 D_1
PS1 0V1_1 - PS1 0V1_2
Q2 D_5 - Q4 D_1
U2 VDD - C10 P1
PS1 OUT1_1 - PS1 OUT1_2
PS1 0V1_1 - PS1 0V1_2
Q7 S_3 - Q9 S_1
U4 OUTN - Q3 S_1
U2 PA7 - U3 MOSI
U3 XO - Y1 P2
Q6 D_5 - Q8 D_1
R15 P2 - R16 P1
U2 PA6 - U3 MISO
U3 TOCAP - C28 P1
U5 GATE - Q10 G
U3 RXN - J1 RD-
PS1 0V1_1 - PS1 0V1_2
U2 PC7 - J3 SDA
U4 BG78 - Q9 G
U3 TOCAP - C28 P1
U2 VDD - C10 P1
U5 OUT - Q10 D
PS1 0V1_1 - PS1 0V1_2
PS1 0V1_1 - PS1 0V1_2
PS1 0V1_1 - PS1 0V1_2
Q2 S_3 - Q3 D_1
U2 VDD - C10 P1
R15 P2 - R16 P1
PS1 0V1_1 - PS1 0V1_2
U3 ~RST - R10 P2
PS1 0V1_1 - PS1 0V1_2
J5 Pin_4 - U2 PA14
U4 TG45 - Q6 G
U2 VDD - C10 P1
J1 VC+_2 - BR2 AC
U4 BG45 - Q7 G
U4 IN78 - Q8 S_1
BR3 AC - D4 2
J2 ~ - Q1 D
U3 PMODE2 - R7 P2
PS1 0V1_1 - PS1 0V1_2
U2 VDD - C10 P1
PS1 OUT1_1 - PS1 OUT1_2
U3 XI/CLKIN - Y1 P1
U5 GATE - Q10 G
U3 ~RST - R10 P2
PS1 0V1_1 - PS1 0V1_2
U4 BG36 - Q5 G
BR1 - - BR2 -
PS1 0V1_1 - PS1 0V1_2
PS1 0V1_1 - PS1 0V1_2
J1 RCT - BR1 AC
U2 PC7 - J3 SDA
U2 VDD - C10 P1
U1 BOOT - C4 P1
F1 P2 - D2 A
U4 TG45 - Q6 G
U2 VDD - C10 P1
U2 VDD - C10 P1
U2 VDD - C10 P1
BR3 AC - D4 2
R15 P2 - R16 P1
U4 OUTP - U4 EN
U2 VDD - C10 P1
J5 Pin_4 - U2 PA14
PS1 0V1_1 - PS1 0V1_2
PS1 0V1_1 - PS1 0V1_2
PS1 0V1_1 - PS1 0V1_2
Q8 S_3 - Q9 D_1
U2 VDD - C10 P1
U2 PA3 - U3 ~INT
U2 VDD - C10 P1
U1 PG - R3 P1
PS1 0V1_1 - PS1 0V1_2
R1 P2 - R2 P1
U2 VDD - C10 P1
U2 VDD - C10 P1
U2 VDD - C10 P1
U4 TG12 - Q2 G
J5 Pin_5 - U2 PG10
U3 XO - Y1 P2
U4 BG78 - Q9 G
J5 Pin_2 - U2 PA13
R6 P2 - U3 RSVD
PS1 0V1_1 - PS1 0V1_2
Q5 S_3 - Q7 S_1
PS1 0V1_1 - PS1 0V1_2
U1 SW - C4 P2
J5 Pin_5 - U2 PG10
U3 TXP - J1 TD+
U3 PMODE1 - R8 P2
U2 VDD - C10 P1
U2 VDD - C10 P1
U1 EN - C2 P1
PS1 0V1_1 - PS1 0V1_2
U2 VDD - C10 P1
U2 VDD - C10 P1
J1 VC-_2 - BR2 AC
J1 VC-_2 - BR2 AC
U3 1V2O - C29 P1
J4 Pin_3 - R13 P1
U2 VDD - C10 P1
PS1 0V1_1 - PS1 0V1_2
U3 PMODE0 - R9 P2
U3 TXP - J1 TD+
PS1 OUT1_1 - PS1 OUT1_2
U3 RXN - J1 RD-
Q4 S_3 - Q5 D_1
R6 P2 - U3 RSVD
U2 VDD - C10 P1
BR1 - - BR2 -
U4 BG45 - Q7 G
U2 VDD - C10 P1
J5 Pin_5 - U2 PG10
U3 RXP - J1 RD+
U2 VDD - C10 P1
Q5 S_3 - Q7 S_1
U4 TG78 - Q8 G
U2 VDD - C10 P1
BR1 + - BR2 +
J1 VC+_2 - BR2 AC
F1 P2 - D2 A
BR3 AC - D4 2
U2 PA3 - U3 ~INT
PS1 0V1_1 - PS1 0V1_2
Q3 S_3 - Q5 S_1
U3 EXRES1 - R6 P1
U3 1V2O - C29 P1
PS1 0V1_1 - PS1 0V1_2
U1 VCC - C5 P1
U4 TG36 - Q4 G
U5 OUT - Q10 D
U2 PA7 - U3 MOSI
U3 PMODE1 - R8 P2
PS1 0V1_1 - PS1 0V1_2
U2 VDD - C10 P1
U2 VDD - C10 P1
U5 IN - U5 SOURCE
U2 VDD - C10 P1
U4 TG78 - Q8 G
BR3 AC - D4 1
PS1 0V1_1 - PS1 0V1_2
PS1 0V1_1 - PS1 0V1_2
U4 IN45 - Q6 S_1
U4 IN36 - Q4 S_1
U2 PA8 - R15 P1
Q4 D_5 - Q6 D_1
R13 P2 - R14 P1
PS1 0V1_1 - PS1 0V1_2
PS1 0V1_1 - PS1 0V1_2
U2 VDD - C10 P1
PS1 0V1_1 - PS1 0V1_2
U2 VDD - C10 P1
Q7 S_3 - Q9 S_1
U5 OUT - Q10 D
U2 PA4 - U3 ~SCS
U4 ~EN~ - Q2 D_1
U5 IN - U5 SOURCE
U1 BOOT - C4 P1
U5 IN - U5 SOURCE
J4 Pin_3 - R13 P1
BR1 + - BR2 +
PS1 0V1_1 - PS1 0V1_2
U4 BG12 - Q3 G
U1 SW - C4 P2
U3 RXP - J1 RD+
PS1 0V1_1 - PS1 0V1_2
U1 VCC - C5 P1
U2 PC6 - J3 SCL
PS1 0V1_1 - PS1 0V1_2
U4 IN78 - Q8 S_1
Q8 S_3 - Q9 D_1
U1 EN - C2 P1
J2 ~ - Q1 D
U2 VDD - C10 P1
J5 Pin_6 - U2 PB3
PS1 0V1_1 - PS1 0V1_2
Q6 S_3 - Q7 D_1
U2 VDD - C10 P1
U4 OUTP - U4 EN
PS1 0V1_1 - PS1 0V1_2
U2 VDD - C10 P1
U5 OUT - Q10 D
Q6 S_3 - Q7 D_1
U2 VDD - C10 P1
U4 OUTN - Q3 S_1
J1 TCT - BR1 AC
U1 SW - C4 P2
U2 VDD - C10 P1
PS1 0V1_1 - PS1 0V1_2
BR1 - - BR2 -
U2 VDD - C10 P1
U2 PB8 - R5 P1
U2 VDD - C10 P1
PS1 0V1_1 - PS1 0V1_2
PS1 0V1_1 - PS1 0V1_2
U3 XI/CLKIN - Y1 P1
U1 PG - R3 P1
U2 PC6 - J3 SCL
BR1 - - BR2 -
BR1 - - BR2 -
PS1 0V1_1 - PS1 0V1_2
U2 PC6 - J3 SCL
PS1 0V1_1 - PS1 0V1_2
U2 PA5 - U3 SCLK
J5 Pin_2 - U2 PA13
PS1 0V1_1 - PS1 0V1_2
U2 VDD - C10 P1
U3 XI/CLKIN - Y1 P1
PS1 0V1_1 - PS1 0V1_2
J5 Pin_5 - U2 PG10
PS1 0V1_1 - PS1 0V1_2
U4 IN12 - Q2 S_1
U4 BG36 - Q5 G
J5 Pin_6 - U2 PB3
U2 VDD - C10 P1
U3 XO - Y1 P2
U2 PC7 - J3 SDA
PS1 0V1_1 - PS1 0V1_2
BR3 AC - D4 1
R13 P2 - R14 P1
R1 P2 - R2 P1
PS1 0V1_1 - PS1 0V1_2
PS1 0V1_1 - PS1 0V1_2
U2 VDD - C10 P1
R13 P2 - R14 P1
Q6 D_5 - Q8 D_1
U4 IN12 - Q2 S_1
U2 VDD - C10 P1
U2 VDD - C10 P1
U2 PA6 - U3 MISO
U4 BG12 - Q3 G
U2 PA4 - U3 ~SCS
PS1 0V1_1 - PS1 0V1_2
U3 PMODE2 - R7 P2
U2 VDD - C10 P1
U5 OUT - Q10 D
Q2 D_5 - Q4 D_1
U3 TXN - J1 TD-
PS1 0V1_1 - PS1 0V1_2
Q4 D_5 - Q6 D_1
U2 VDD - C10 P1
U4 TG12 - Q2 G
J1 RCT - BR1 AC
J1 TCT - BR1 AC
U3 EXRES1 - R6 P1
PS1 0V1_1 - PS1 0V1_2
U2 VDD - C10 P1
PS1 OUT1_1 - PS1 OUT1_2
U3 TXN - J1 TD-
U1 EN - C2 P1
U4 IN36 - Q4 S_1
U2 VDD - C10 P1
R15
Resistance
33Ω
C6
End of Life
Capacitance
22uF
R11
Resistance
4.7kΩ
R16
Resistance
100kΩ
C7
End of Life
Capacitance
22uF
C28
Capacitance
4.7uF
C12
Capacitance
100nF
C10
Capacitance
100nF
C35
Capacitance
10nF
C2
Capacitance
10uF
C5
Capacitance
1uF
C19
Capacitance
1uF
C15
Capacitance
4.7uF
C3
Capacitance
220nF
R14
Resistance
100kΩ
C27
Capacitance
10uF
C18
Capacitance
100nF
R3
Resistance
100kΩ
C11
Capacitance
100nF
R12
Resistance
4.7kΩ
C20
Capacitance
100nF
R2
Resistance
43.2kΩ
R4
Resistance
10kΩ
C31
Not Recommended for New Designs
Capacitance
27pF
C26
Capacitance
100nF
R1
Resistance
100kΩ
C17
Capacitance
1uF
C22
Capacitance
100nF
C29
Capacitance
10nF
C37
Capacitance
1.5uF
C14
Capacitance
100nF
C36
Capacitance
100nF
C1
Capacitance
470uF
C34
Capacitance
10uF
C13
Capacitance
100nF
C30
Not Recommended for New Designs
Capacitance
27pF
R9
Resistance
10kΩ
R6
Resistance
12.4kΩ
C8
End of Life
Capacitance
22uF
R5
Resistance
10kΩ
R10
Resistance
10kΩ
C9
End of Life
Capacitance
22uF
C25
Capacitance
100nF
C24
Capacitance
100nF
R13
Resistance
1kΩ
C32
Capacitance
100nF
C4
Capacitance
100nF
C16
Capacitance
10nF
C23
Capacitance
100nF
R7
Resistance
10kΩ
C21
Capacitance
100nF
R8
Resistance
10kΩ
C33
Capacitance
100nF
U4
BR3
U1
L1
Inductance
6.8uH
F1
D4
U2
J5
D1
J3
Y1
J1
Q10
J4
D3
Q1

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Project Specification
Prototype / Market Context Update — 2026-07-04
User provided prototype context for the PoE lighting controller:
  • Existing working prototype uses a ZhiPu 95W IEEE 802.3bt splitter as the PoE PD front end, producing a regulated 24V rail into a Philips Hue Perifo track lighting system while bypassing the OEM AC driver.
  • An Olimex ESP32-PoE-ISO board currently handles wired Ethernet control through the splitter passthrough and switches the 24V rail through a relay chain.
  • Measured full prototype load is 72.21W sustained from a UniFi USW Pro XG 48 PoE switch, powering four cylinder spotlights plus two gradient light bars, with stable PoE+++ negotiation and nominal splitter thermal performance.
  • The custom Flux PCB is intended to integrate the Silvertel AG59824 PoE PD front end, 24V rail output, LMR33630 24V-to-3.3V logic buck, STM32G473 MCU, W5500 Ethernet, MOSFET PWM output, and DALI interface.
  • Physical product intent: fixture-location module with RJ45 input and 4-conductor rail output terminal block — Cat6 in, lighting rail out, no additional power/data wiring.
  • Target applications: small medical offices, restaurants, and retail spaces where low-voltage Cat6 retrofit, centralized PoE backup power, per-fixture sensing, lux compensation, and wired network control are strong differentiators.
Project Overview
Status: Draft.
This project is an integrated PoE lighting-control PCB. It accepts Ethernet/PoE input, derives an isolated 24V lighting rail plus a 3.3V logic rail, controls lighting by MOSFET PWM dimming, and exposes DALI plus sensor inputs for lux, occupancy, and temperature/thermal monitoring.
Intended Use
  • Prototype-to-production lighting rail controller for Ethernet-powered lighting installations.
  • Intended to replace relay-style switching with solid-state PWM-capable dimming.
  • Ethernet-only control; no WiFi/BLE antenna assumed.
  • Product may be wired by installers, so output/field-wiring protection is required.
What the Device Should Do
  • Negotiate PoE power from an Ethernet switch/injector.
  • Generate a 24V output rail for lighting/rail power.
  • Generate a regulated 3.3V rail for control electronics.
  • Switch/dim the 24V lighting output with a MOSFET.
  • Communicate over wired Ethernet.
  • Support DALI two-wire lighting control.
  • Read a lux sensor over I2C and occupancy via GPIO/PIR input.
  • Provide development/debug access.
Main Features
  • Integrated isolated PoE PD module for first revision.
  • 24V rail output terminals sized around measured load plus headroom.
  • 3.3V control rail.
  • MCU + W5500 Ethernet controller architecture preferred for production.
  • PWM MOSFET output stage.
  • DALI interface.
  • I2C sensor header and PIR input.
  • Programming/debug header and test points.
  • Reverse-polarity/output miswire protection on field terminals where practical.
System Architecture

Diagram


RJ45 PoE Ethernet Integrated isolated PoE PD module 24V Lighting Rail 24V to 3.3V Buck 3.3V Logic Rail STM32-class MCU W5500 Ethernet Controller PWM MOSFET Dimmer Output Protection Rail Output Terminals DALI Interface I2C Lux Sensor Header PIR GPIO Input
Hardware Subsystems
  • Power: integrated PoE PD module, isolated 24V conversion, 24V-to-3.3V regulator, protection, bulk capacitance, and test points.
  • Compute/control: STM32-class MCU with GPIO for SPI Ethernet, PWM, DALI control, I2C, PIR, reset, and debug.
  • Ethernet: W5500 Ethernet controller and RJ45 with magnetics.
  • Lighting output: MOSFET dimming path sized for the expected lighting current and thermal margin.
  • DALI: DALI bus interface connected to the rail conductors or dedicated output pins as finalized.
  • Sensors: I2C lux sensor header, PIR input header, optional temperature monitoring.
Interfaces and Connections
  • PoE/Ethernet input: RJ45.
  • Lighting rail output: 24V+, 24V-, DALI+, DALI- terminal block.
  • Sensor input: 3.3V I2C header for lux sensor.
  • PIR input: power, ground, and GPIO signal header.
  • Debug: SWD/programming header.
Power and Runtime Expectations
  • Input source: PoE switch or injector.
  • Output rail target: 24V lighting rail.
  • Logic rail target: 3.3V.
  • Runtime: continuous powered operation; no battery.
Power Tree and Power Budget
Sizing inputs:
  • Measured 24V system draw: 22.90W, about 0.95A at 24V.
  • User-selected design target: 24V output rail with 2–3A production headroom.
  • Practical 24V power target: true 3A headroom at 24V, which requires an 89W-class 802.3bt module or equivalent rather than a 60W-only module.
  • The existing Ag5324 module is now considered prototype-only/undersized for this target.
  • Leading production-headroom candidate: Silvertel AG59824-LPB, IEEE 802.3bt Class 8, 24V 89W-class isolated output.
  • Lower-power fallback candidate: Silvertel Ag5810, IEEE 802.3bt Type 4 Class 7, 60W, configurable 12V/24V isolated output, suitable only if the rail is capped around 2.5A.
  • 3.3V electronics: provisional 250–500mA peak budget.
Power tree:

Diagram


PoE PSE / Injector RJ45 + Magnetics Integrated Isolated PoE PD Module 24V Rail Lighting Output / MOSFET Dimming 3.3V Buck Regulator 3.3V Logic Rail MCU W5500 Sensors and DALI Logic
Manufacturing and Assembly Expectations
  • Production-intent PCB, but first revision should favor known-good integrated blocks where possible.
  • Use test points on 24V, 3.3V, GND, reset, and programming signals.
  • Ethernet and PoE layout will need controlled impedance and careful isolation/creepage review.
Firmware-Relevant Hardware Requirements
  • PWM output for dimming MOSFET gate control.
  • SPI for W5500 Ethernet controller.
  • I2C for lux sensor.
  • GPIO interrupt/input for PIR.
  • DALI transmit/receive control pins.
  • Debug/programming header.
Physical Design Expectations
  • Board size not yet specified.
  • RJ45 and rail terminal block should be board-edge accessible.
  • Keep high-voltage/high-current PoE and 24V switching areas separated from low-level logic.
Important Design Decisions
  • Use an integrated isolated PoE PD module for revision 1 instead of a discrete PoE PD controller plus custom flyback.
  • Size the production-intent 24V rail for 2–3A headroom, not only the measured 0.95A load.
  • Replace the current Ag5324 power module before layout. Use AG59824-LPB or equivalent for true 3A headroom; use Ag5810 only for a deliberate 2.5A/60W cap.
  • Use Ethernet-only architecture; no WiFi/BLE antenna.
  • Prefer W5500 + separate STM32-class MCU for production supportability.
  • Relay replaced by MOSFET to support PWM dimming.
  • Add reverse-polarity/output protection for field wiring mistakes.
  • Rev 1 DALI scope: protected DALI terminals only; full DALI PHY/transceiver and firmware commissioning are deferred to rev 2.
  • Rev 1 output abuse scope: protect against reversed passive load wiring only; externally powered reverse polarity, cable shorts, hot-plug capacitance, and inductive kick remain production/rev-2 protection requirements.
  • Layout may not proceed until AG59824-LPB has a correct reusable footprint/STEP association.
Assumptions
  • The 24V load is currently about 22.90W / 0.95A based on measured data.
  • The design target is now 2–3A lighting-output headroom; exact PoE module footprint and thermal design must be confirmed before layout.
  • 3.3V control current is provisionally 500mA peak.
  • DALI bus details are provisional until rail wiring and compliance requirements are finalized.
  • This is not yet a certified safety/compliance design.
Change Notes
  • Initial project specification created from the pasted architecture on 2026-07-04.
  • Updated with measured 22.90W load, 2–3A growth-headroom note, W5500 + STM32 direction, and reverse-polarity protection requirement.
  • Updated after follow-up module research: AG59824-LPB is the leading true-3A production candidate; Ag5810 remains a 60W/2.5A fallback. Both require library part creation/import and footprint verification before layout.
  • Implemented AG59824-LPB in the schematic as PS1, added AG59824 output/input capacitors, upgraded the 24V output PTC to 3A hold, and wired DALI terminal TVS protection. Remaining production caveats: replace provisional DF01S PoE input bridges with MOSFET rectification or higher-current bridges, verify Schottky output reverse-protection thermals at 3A, and verify exact AG59824-LPB footprint before PCB layout release.
  • Prototype / Market Context Update — 2026-07-04

  • Project Overview

  • Intended Use

  • What the Device Should Do

  • Main Features

  • System Architecture

  • Hardware Subsystems

  • Interfaces and Connections

  • Power and Runtime Expectations

  • Power Tree and Power Budget

  • Manufacturing and Assembly Expectations

  • Firmware-Relevant Hardware Requirements

  • Physical Design Expectations

  • Important Design Decisions

  • Assumptions

  • Change Notes

Documents

  • Project Specification

  • Firmware Starter — STM32G473 + W5500 PoE Lighting Controller

  • Board Bring-Up Plan — PoE Lighting Controller

  • Power Budget and PoE Module Selection

  • PCB Pre-Layout Gate — Power Stage

  • Manufacturing Readiness Checklist — PoE Lighting Controller

  • BOM Lock Status — PoE Lighting Controller

  • Critical Footprint Verification Notes — PoE Lighting Controller

Assets

step

PS1 Silvertel AG59800/AG59824-LPB detailed STEP model

Ag59800_Detailed.step3D Model
step

Silvertel Ag59800 simplified STEP model

Ag59800_Simplified.step3D Model
kicad_mod

J1 Abracon ARJM11D7-114-AB-EW2 reference KiCad footprint

ARJM11D7-114-AB-EW2.kicad_modFootprint
step

Silvertel Ag59800 detailed STEP model

Ag59800_Detailed.step3D Model
step

Silvertel Ag59800/AG59824-LPB STEP package

Ag59800.zip3D Model

PoE Lighting Controller

PoE Lighting Controller thumbnail
Integrated PoE lighting-control PCB with 802.3bt PoE input, isolated 24V/3.3V power, Ethernet control, MOSFET dimming, DALI interface, and sensor inputs.

Properties

Lighting

24

V

Ethernet

PoE

Pricing & Availability

Distributor

Qty 1

Arrow

$29.78–$55.45

Digi-Key

$19.37–$20.44

HQonline

$7.45–$7.49

LCSC

$34.10–$35.63

Mouser

$68.08–$68.31

TME

$12.22–$12.26

Verical

$27.94–$277.41

Controls