PCB Impedance Calculator
Get the characteristic or differential impedance of a PCB trace from your stack-up. Pick one of seven trace types — microstrip, embedded microstrip, stripline and their coupled variants — enter the trace and dielectric dimensions in your own units, and read off the impedance plus propagation delay, capacitance and inductance per inch. Uses the IPC-2141 closed-form approximations.
The IPC-2141 formulas are closed-form approximations: they ignore solder mask, copper roughness, glass-weave effects and the frequency dependence of the dielectric constant, and they lose accuracy outside 0.1 < w/h < 3. Treat the result as a starting point and confirm the final trace type and dimensions against your fab's controlled-impedance stack-up.
Route USB, HDMI and RF nets straight to their impedance target
A calculator gives you one number for one trace type. Getting a real interface onto a board still means setting the impedance requirement on the right nets, keeping each differential pair matched, and re-checking the numbers whenever the layer or dielectric changes. In Flux you state the requirement — the impedance and the pair come out routed on the canvas.
- Give the impedance target instead of hand-picking width and spacing
- Differential pairs are set up and routed as pairs for you
- Stack-up changes propagate to the traces that depend on them
In Flux
With 1 oz copper over 0.2 mm of FR-4 (εr 4.3), 90 Ω on layer 1 works out to:
- Width: 0.23 mm (9 mil)
- Spacing: 0.15 mm (6 mil)
I've set the USB_DP/USB_DM pair to that width and gap, matched their lengths, and routed them over the ground plane on layer 1.
How the impedance is calculated
The IPC-2141 approximation for the selected trace type — microstrip — evaluated client-side as you type.
Microstrip impedance
A single trace on an outer layer, over one reference plane, with air above it. Valid for 0.1 < w/h < 3.0 and 1 < εr < 15.
A microstrip buried under dielectric instead of air, so the effective dielectric constant εrp rises towards εr as the covering thickens.
Two coupled microstrips side by side. The bracket is the coupling term: as the gap s closes, the differential impedance drops.
A trace centred between two reference planes, h of dielectric above and below. Fully embedded copper sees εr in every direction.
A stripline that is not centred, with ha of dielectric above the trace and hb below it. h1 is the smaller of the two — the distance to the nearer plane — and h2 the larger, so the last factor corrects for the offset.
Two traces stacked one above the other between the planes, ht apart, each hp from its nearer plane.
Two coupled traces side by side between the planes: the single-ended stripline impedance first, then the coupling term for the pair.
Units and symbols
Every dimension appears as a ratio, so the units cancel as long as they match — the calculator converts each field to millimetres first. w is the trace width, t its finished copper thickness, s the edge-to-edge gap in a pair, h the dielectric height to the reference plane and εr the dielectric constant of the laminate.
Delay, C and L
Delay is in ps/inch. A surface microstrip is partly in air, so εeff ≈ 0.475εr + 0.67; a fully embedded trace uses εr itself, which is why striplines are the slower of the two.
Impedance calculator FAQ
Impedance follows from the trace geometry and the laminate. For a surface microstrip the IPC-2141 approximation is Zo = 87 / √(εr + 1.41) · ln(5.98h / (0.8w + t)), where w is the trace width, t its copper thickness, h the dielectric height to the reference plane and εr the dielectric constant. Buried and coupled trace types use their own variants — pick the trace type above and the calculator shows the formula it used.
Use microstrip for a trace on an outer layer over a plane, embedded microstrip when that trace is covered by more dielectric (or a thick soldermask/coverlay), and stripline for an inner-layer trace between two planes. If the trace is not centred between those planes, use asymmetric stripline. For differential pairs, use edge coupled microstrip or stripline when the two traces sit side by side, and broadside coupled stripline when they are stacked on adjacent layers.
Characteristic impedance (Zo) is what a single trace presents against its reference plane — the number you match to a 50 Ω source. Differential impedance (Zd) is what a pair presents to a differential driver, and it is a bit less than twice the single-ended value because the two traces couple to each other. Common targets are 100 Ω for USB and Ethernet, 90 Ω for USB 2.0 and 85–100 Ω for PCIe.
With 1 oz copper and εr ≈ 4.3, a surface microstrip over 0.2 mm (8 mil) of prepreg needs roughly 0.33 mm (13 mil) of width. Halve the dielectric height and you roughly halve the width. Enter your stack-up above and adjust the trace width until the impedance reads 50 Ω.
They are closed-form curve fits, typically within a few percent when 0.1 < w/h < 3 and 1 < εr < 15, and they drift outside that range. They also ignore soldermask, copper roughness, trapezoidal etch profiles, glass-weave effects and the fact that εr falls with frequency. For a controlled-impedance build, use them to choose a candidate trace type and confirm it against your fab's stack-up model.
No. Describe the interface — "USB 2.0 at 90 Ω differential" — and Flux applies that impedance requirement to the net class, sets the trace width and spacing for your stack-up and routes the pair on the canvas, keeping them consistent when the stack-up changes.