PCB Net Routing Completion

flux

Mình sẽ thay J_DWIN sang connector FFC/FPC 10 pin pitch 1.0 mm. Trước tiên mình lưu lại toàn bộ kết nối pin hiện tại, tìm đúng linh kiện 1.0 mm trong thư viện, thay component rồi nối lại đúng 10 chân và kiểm tra lại.

flux

Mình chưa thay được J_DWIN vì phiên làm việc đã hết credit ngay sau khi bắt đầu bước thay linh kiện.
Đã làm được:
  • Xác nhận J_DWIN hiện tại là FFC2B35-10-G, 10 pin, pitch 0.5 mm.
  • Xác nhận nếu màn/cáp DWIN của bạn là 1.0 mm pitch thì connector hiện tại không cắm vừa.
  • Bắt đầu kế hoạch thay sang FFC/FPC 10 pin, pitch 1.0 mm.
Còn cần làm khi tiếp tục:
  1. Lưu lại toàn bộ net đang nối vào 10 chân J_DWIN.
  2. Tìm linh kiện thư viện phù hợp: FFC/FPC 10 pin, pitch 1.0 mm, đúng loại tiếp xúc top/bottom theo cáp DWIN thực tế.
  3. Thay J_DWIN cũ bằng connector 1.0 mm.
  4. Nối lại đúng các chân:
    • 5V
    • GND
    • DWIN_RXD
    • DWIN_TXD
    • các chân NC nếu có.
  5. Kiểm tra lại schematic và PCB footprint sau khi thay.
Tìm connector 1.0mm
Kiểm tra ERC/DRC
So sánh contact
Giữ mapping chân

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Final PCB Safety Inspection
Date: 2026-05-28 Scope: Read-only PCB safety inspection. No routing, placement, schematic, copper, or rule changes were made.
Executive Summary

Table

CheckResultNotes
ESP32 antenna keepoutFAIL / NOT VERIFIABLENo distinct ESP32 antenna keepout object was found in the inspected PCB data. Without a defined keepout, I cannot prove there are no copper traces, vias, pours, components, or silkscreen over the antenna area.
ESP32 plug-in header footprintPASSThe ESP32 socket appears to use two 22-pin 2.54 mm header rows (J10, J11) with approximately 25.4 mm row-to-row spacing, matching the common ESP32-S3-DEVKITC-1 style dual-header spacing.
Isolation slot / isolation barrierFAILIsolation keepout zone exists, but copper traces are present crossing/entering the keepout region.
Minimum creepage clearance0 mm effectiveBecause copper crosses the isolation keepout, the effective creepage across the intended barrier is 0 mm at the crossing.
Trace widthFAILMinimum trace width is 0.15 mm. This is below the requested thresholds for signals, 5V/3V3 power, and RS485 A/B routing.
Check 1: ESP32 Antenna Keepout
Findings
  • Board contains ESP32 devkit/socket-style headers:
    • J10: Pin Header 01x22, 2.54 mm pitch, vertical; center approximately x=-47.4 mm, y=-25.5 mm.
    • J11: Pin Header 01x22, 2.54 mm pitch, vertical; center approximately x=-22.0 mm, y=-25.5 mm.
    • Row-to-row center spacing: approximately 25.4 mm.
  • This matches a common ESP32-S3-DEVKITC-1 plug-in footprint style and should physically fit a dual-row 2.54 mm ESP32 devkit if the mating board has the same row spacing and pin count.
  • I did not find a separate PCB zone/keepout labeled as ESP32 antenna keepout in the inspected PCB layout data.
Antenna keepout objects inside/crossing
Because no antenna keepout object was found, objects inside/crossing the antenna keepout cannot be definitively enumerated. This is treated as FAIL / NOT VERIFIABLE.
Recommendation
Add an explicit antenna keepout zone for the ESP32 module antenna end, on all copper layers and silkscreen, then rerun this inspection. For ESP32-S3-DEVKITC-1, confirm the exact antenna end from the specific devkit mechanical drawing before defining the keepout.
Check 2: Isolation Slot / Isolation Barrier
Isolation keepout geometry observed
A red isolation keepout rectangle was present in the layout data:
  • Approximate bounds: x = -4 mm to +8 mm, y = -34 mm to +34 mm.
  • Description: Isolation Keepout.
Copper crossing / entering keepout
The exported layout data shows routed copper entering or crossing this isolation keepout. Example observed crossing:
  • Net: 5V
  • Segment path includes a top-layer trace from approximately (9.1137 mm, 25.6139 mm) to (-9.75 mm, 44.4776 mm), which crosses the keepout rectangle near its upper portion.
  • Since this is copper crossing the intended isolation keepout, the isolation barrier fails this inspection.
Vias inside slot/keepout
No isolated list of vias inside the slot could be fully extracted without modifying the board. However, because copper is already crossing the keepout, the barrier fails regardless of via status.
Copper pour entering keepout
No copper-pour intrusion was confirmed from the inspected data. The failure is based on routed copper entering/crossing the keepout.
Silkscreen bridge
No silkscreen bridge was confirmed from the inspected data. However, the inspection cannot pass because routed copper crosses the isolation keepout.
Minimum creepage clearance
  • Effective minimum creepage between logic-side and isolated-side copper: 0 mm.
  • Reason: routed copper enters/crosses the isolation keepout/barrier, so the barrier is bridged by copper.
Check 3: Trace Width
Minimum trace width used
  • Minimum trace width observed/computed: 0.15 mm.
  • Route segment count in layout summary: 1042 route segments.
  • Many/all inspected routed segments report computed size 0.00015 m = 0.15 mm, and all net routing rules inspected use traceWidth = 0.15 mm.
Requested thresholds

Table

CategoryRequired minimumObservedResult
Signal traces0.20 mm0.15 mmFAIL
5V / 3V3 power traces0.40 mm0.15 mmFAIL
RS485_A / RS485_B traces0.25 mm0.15 mmFAIL
0.15 mm traces and net names
All routing rules inspected were set to 0.15 mm, so the board should be treated as using 0.15 mm routing broadly, not just local pad escapes.
Power nets below requested width
  • 5V — SHOULD_WIDEN except short pad escapes.
  • 3V3 — SHOULD_WIDEN except short pad escapes.
  • 5V_ISO1 — SHOULD_WIDEN if used as power distribution, acceptable only for very short IC/cap pad escapes.
  • 5V_ISO2 — SHOULD_WIDEN if used as power distribution, acceptable only for very short IC/cap pad escapes.
  • 5V_ISO3 — SHOULD_WIDEN if used as power distribution, acceptable only for very short IC/cap pad escapes.
RS485 A/B nets below requested width
  • RS485_A_IC — SHOULD_WIDEN to at least 0.25 mm except tiny pad escape.
  • RS485_A_PLUS — SHOULD_WIDEN to at least 0.25 mm.
  • RS485_B_IC — SHOULD_WIDEN to at least 0.25 mm except tiny pad escape.
  • RS485_B_MINUS — SHOULD_WIDEN to at least 0.25 mm.
Signal nets below requested 0.20 mm
These are below the requested signal threshold and should be manually reviewed. Short escapes from small pads may remain 0.15 mm, but longer routes should be widened to at least 0.20 mm:
RS2323_R1OUT, Net 11, ALARM, SPI_MOSI, RS2323_C1_PLUS, ENA, Net 28, J11_05_I2C_SCL_SRC, GPIO9_LCD_RST_EXT_SRC, Net 14, Net 21, LCD_BL, RS2321_GNDISO, J11_04_I2C_SDA_SRC, RS485_DE, RS2322_TXD, GPIO13_SPI_MISO_EXT_SRC, I2C_SCL, RS2322_RXD, LCD_RST, RS485_RX, RS2323_TX_OUT, RS2323_VPLUS, STEP, SENSOR2_OUT, J11_02_LCD_RST_SRC, RS2322_GNDISO, Net 29, RS2323_RX_IN, GND, LCD_UART_RX, GPIO3_LCD_BL_EXT_SRC, Net 25, GPIO8_LCD_DC_EXT_SRC, SENSOR2_RAW, Net 13, Net 31, Net 12, RS2322_RX_IN, RS2323_TX_ISO_IN, SENSOR1_OUT, RS2321_TXD, Net 20, Net 18, J11_06_TOUCH_IRQ_SRC, ESP32_DWIN_RX, RS2321_RXD, Net 27, Net 10, Net 23, SPI_CS, GPIO14_SPI_SCLK_EXT_SRC, SENSOR1_RAW, RS2323_VMINUS, RS2323_GNDISO, Net 17, Net 15, SPI_SCLK, Net 26, GPIO11_SPI_MOSI_EXT_SRC, ESP32_DWIN_TX, RS2323_T1IN, LCD_DC, RS2323_C2_PLUS, Net 1, I2C_SDA, GPIO12_SPI_CS_SRC, RS2323_C1_MINUS, RS2321_TX_OUT, Net 22, RS2323_T1OUT, SPI_MISO, TOUCH_IRQ, RS2323_RXD, DWIN_TXD, RS2323_TXD, RS485_TX, Net 24, RS2321_RX_IN, RS2323_R1IN, J11_03_LCD_BL_SRC, DWIN_RXD, RS2322_TX_OUT, Net 16, LCD_UART_TX, DIR, Net 19, RS2323_C2_MINUS.
Manual widening list
Priority list for manual widening:
  1. 5V to at least 0.40 mm for distribution paths.
  2. 3V3 to at least 0.40 mm for distribution paths.
  3. 5V_ISO1, 5V_ISO2, 5V_ISO3 to at least 0.40 mm where they distribute isolated power.
  4. RS485_A_PLUS, RS485_B_MINUS, RS485_A_IC, RS485_B_IC to at least 0.25 mm where not constrained by small pad escape.
  5. All longer signal routes currently at 0.15 mm should be widened to at least 0.20 mm; keep 0.15 mm only for very short pad-escape neckdowns.
Final PASS/FAIL
  • Antenna keepout: FAIL / NOT VERIFIABLE
  • ESP32 header/socket fit: PASS
  • Isolation barrier: FAIL
  • Minimum creepage distance: 0 mm effective
  • Trace width: FAIL
Important note
This inspection was read-only. No rerouting, movement, deletion, schematic edits, or rule changes were performed.

  • Executive Summary

  • Check 1: ESP32 Antenna Keepout

  • Findings

  • Antenna keepout objects inside/crossing

  • Recommendation

  • Check 2: Isolation Slot / Isolation Barrier

  • Isolation keepout geometry observed

  • Copper crossing / entering keepout

  • Vias inside slot/keepout

  • Copper pour entering keepout

  • Silkscreen bridge

  • Minimum creepage clearance

  • Check 3: Trace Width

  • Minimum trace width used

  • Requested thresholds

  • 0.15 mm traces and net names

  • Manual widening list

  • Final PASS/FAIL

  • Important note

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