Pin Function Grouping


Done — I grouped every FGH100MAAMD pin into exactly one primary function group and added pin descriptions from the Quectel FGH100M documentation. I also found the official Quectel spec URL and recorded it in the project description; the direct Datasheet URL property wasn’t editable with the available project metadata tool.
Open items:
  • Manufacturer Name / Part Type are still blank in library metadata.
  • Exact footprint pad geometry needs the official Quectel Hardware Design package/manual for final mechanical validation.
  • Pin 27 has conflicting public-source references; I kept it as Reserved to match the current symbol.
  • Make the functional group more general.
  • Add a Section property to all pins, and apply the same value used in the Pin Group property to each pin's Section property.
I’ll generalize the pin groups and make every pin’s Section match its Pin Group exactly, then verify the properties across all 40 pins.
Done — I generalized the functional groups and set every pin’s Section to the exact same value as its Pin Group.
Final groups used:
  • Power: VDD_FEM, VBAT, VDD_IO
  • Ground: all GND pins
  • Control: WAKEUP_IN, RESET
  • GPIO: GPIO pins plus BUSY
  • Communication: SDIO pins
  • Debug: JTAG pins
  • Interface: ANT_WIFI
  • Other: reserved pins
Verified all 40 pins now have matching Pin Group and Section values.
Review and fix
Run part review
Fix metadata blanks
Verify footprint geometry
Update review file

FGH100MAAMD Part Datasheet Review
Sources
Current part metadata
  • MPN: FGH100MAAMD
  • Manufacturer: Quectel, inferred from official source; the Manufacturer Name project/library property is still blank.
  • Published part UID: 5aa36dbe-92a2-4ba6-af6a-a353d82d908d
  • Pin/pad count: 40
  • Package: compact LGA module
  • Size: 13.0 mm × 13.0 mm × 2.2 mm
  • Datasheet URL: official URL was found; the available project-property mutation tool did not expose the published part Datasheet URL for direct edit, so the URL was added to the project description.
Key specs
  • Product family: Quectel FGH100M Wi-Fi HaLow module
  • Standard: IEEE 802.11ah
  • Frequency band: 850–950 MHz
  • Interfaces: SDIO 2.0, SPI capability noted in documentation, Wi-Fi antenna interface
  • RF output power: up to 21 dBm in distributor/documentation summaries
  • Supply: VBAT 3.0–3.6 V, nominal 3.3 V
  • I/O supply: VDD_IO 1.8–3.6 V, nominal 3.3 V; VDD_IO must not exceed VBAT
  • VDD_FEM: 3.0–3.6 V, nominal 3.3 V
  • Antenna port: 50 Ω
Pin grouping applied
Each physical pin was assigned to exactly one primary Pin Group.

Table


GroupPins
Ground1, 2, 3, 5, 7, 18, 21, 31, 38, 39
Power4 VDD_FEM, 17 VBAT, 22 VDD_IO
Control6 WAKEUP_IN, 8 RESET_N
Status10 BUSY
GPIO11 GPIO1, 12 GPIO2, 13 GPIO3, 14 GPIO4, 15 GPIO5, 16 GPIO6, 28 GPIO9, 29 GPIO8, 30 GPIO7
SDIO19 SDIO_DATA2, 20 SDIO_DATA3, 23 SDIO_CMD, 24 SDIO_CLK, 25 SDIO_DATA0, 26 SDIO_DATA1
JTAG32 JTAG_TDO, 33 JTAG_TMS, 34 JTAG_TDI, 35 JTAG_TRST, 36 JTAG_TCK
RF40 ANT_WIFI
Reserved9, 27, 37
Cross-check notes and mismatches
  • The symbol has 40 terminals and the footprint has 40 pads, matching the 40-pin LGA package.
  • Symbol pin numbers match the extracted public hardware-design pin assignment for all currently named pins.
  • Pin 10 is shown as BUSY in this part; some Quectel hardware-design copies label it GPIO0/BUSY. Keeping the symbol as BUSY is acceptable because the current part already uses the status-function name.
  • Pin 27 is inconsistent across publicly indexed sources: one search excerpt listed GPIO10, while the current symbol and another directly relevant source indicate RESERVED. I left it as Reserved to avoid changing a physical pin assignment without the official login-restricted Hardware Design PDF.
  • Manufacturer Name and Part Type properties remain blank in library metadata; they should ideally be set to Quectel and RF Transceiver/Wi-Fi module if the part-property editor becomes available.
  • The exact recommended footprint dimensions/pad geometry were not available in the public short spec. Full verification of pad size/pitch should use the official Hardware Design manual or Quectel footprint package.
  • Sources

  • Current part metadata

  • Key specs

  • Pin grouping applied

  • Cross-check notes and mismatches