Reorganized all 95 CMV2000-2E5M1LP terminals into seven datasheet-backed sections. Power is first, Ground last, and each section is evenly balanced left/right with unique terminal ordering.
Pin Group removed from every terminal.
No pins were renamed, replaced, renumbered, deleted, or remapped.
All 95 package coordinates remain unchanged and unique.
Official ams OSRAM DS000734 v8-00 shows principal ceramic LGA body outline 13.50 x 16.50 mm, but the Flux footprint fabrication/silkscreen outline is 13.50 x 18.65 mm and courtyard is correspondingly oversized.
check and correct if necessary according to the datasheet
I’ll verify the DS000734 v8-00 mechanical drawing and current footprint dimensions, then correct only the body-related fabrication, silkscreen, and courtyard geometry if the 18.65 mm extent is unsupported.
The datasheet confirms 18.65 mm belongs to the µPGA lead-related overall extent, not the ceramic LGA body. I’ve corrected the footprint asset to the 13.50 × 16.50 mm body and retained its existing 1.00 mm courtyard margin; now I’m verifying the loaded footprint and all 95 pads.
Verification passed: the corrected asset contains 95 pads with the same grid, omitted A1, 0.300 mm lands, pin-1 marker, and STEP reference; only the body and courtyard Y extents changed.
Sensitivity: 5.56 V/lux·s; responsivity 0.27 A/W at 550 nm; QE × fill factor 60% at 550 nm with microlenses.
Dark current: 125 e⁻/s at 25 °C.
Typical configuration-dependent power: approximately 550–1200 mW.
Supply domains include VDD20 2.1 V, VDDPIX 3.0 V, and VDD33/Vres_H 3.3 V.
Schematic symbol and pin audit
All 95 populated package coordinates are present and unique; A1 is correctly omitted from the 8 × 12 grid.
Symbol-to-footprint mapping is complete: 95/95 terminals correspond to the correct footprint pad coordinates.
Functional pin coverage includes LVDS data pairs, clock/control pairs, SPI/control, exposure signals, bias/reference nodes, supply rails, grounds, analog/test outputs, and test pins.
Symbol mismatches and quality issues
All 95 terminals lack pin descriptions.
All 95 terminals use Pin Type = Unspecified; the datasheet classifies pins as bias, digital input, digital output, ground, LVDS input, LVDS output, supply, analog output, or test.
Several terminal names are nonliteral relative to the datasheet, including:
CMD_P__INV vs CMD_P_INV
FRAME__REQ vs FRAME_REQ
SYS__RES_N vs SYS_RES_N
LVDS__CLK_P/N vs LVDS_CLK_P/N
OUT_CLK_P/N vs OUTCLK_P/N
OUT_CTR_P/N vs OUTCTR_P/N
VTF_L1_ vs Vtf_l1
Repeated rails are uniquely suffixed (GND_1…11, VDD20_1…5, VDD33_1…3, VDDPIX_1…3) rather than using the literal repeated datasheet names.
The rendered custom symbol has poor/garbled text in places, reducing readability.
The double underscores may be an internal convention for active-low notation, and repeated-rail suffixes ensure unique terminal designators, but neither is a literal datasheet transcription.
Footprint audit
95 circular SMD pads, with A1 omitted.
Pad diameter: 0.300 mm, matching the package land specification of Ø0.30 ±0.05 mm.
Pitch: 1.270 mm in X and Y, matching the datasheet.
Pad numbering, grid orientation, and symbol mapping are correct.
The pin-orientation marker is adjacent to the missing-A1 / A2 corner and is consistent with the package grid orientation.
Footprint mismatch
The project fabrication/silkscreen rectangle is 13.50 × 18.65 mm, while the current official package drawing gives the principal body outline as 13.50 ±0.15 × 16.50 ±0.15 mm. The outline is therefore 2.15 mm too long on one axis, and the 15.50 × 20.65 mm courtyard inherits the excess length. Pad geometry itself remains correct.
The datasheet specifies package lands but does not provide a separate recommended PCB solder-land pattern; the footprint uses the nominal 0.30 mm package-land diameter directly as copper pad diameter, so assembly margin should be confirmed with the intended PCB assembler.
3D model
A STEP model (CMV2000-2E5M1LP.stp) is attached to the footprint at origin, unit scale, and zero rotation. Attachment and transform are valid, but mesh dimensions, seating plane, and pin-one details could not be independently measured through structured inspection.
Overall verdict
The part has the correct MPN, core description, 95-pad count, pad grid, pitch, pad size, orientation, and complete terminal-to-pad mapping. The main issues are missing package metadata, absent pin descriptions and electrical types on all terminals, noncanonical signal naming, symbol rendering quality, and a 2.15 mm footprint body-outline/courtyard length mismatch. Only the Datasheet property was changed during this audit.