Sensor Wiring Setup
0:03
Work done
- Integrated the two native PC817 homing sensor channels with labeled X/Y sensor terminals, 10kΩ pullups, 100nF filters, 4.7kΩ status LED resistors, Nano D9/D10 outputs, and a single 0Ω star link between
GND_24VandGND_LOGIC. - Preserved the 100 mm × 152 mm, 2-layer board and placed the new/updated sensor parts in the connector area with no placement overlap or out-of-bounds issues.
- Applied the required 1.6 mm copper spacing rule conservatively and documented the implementation in Homing Sensor Integration Audit.
- ✅ Native X/Y sensor circuitry integrated and connected to
+24V_SENSOR/GND_24V. - ✅
LIMIT_X_NETconnects to Nano D9;LIMIT_Y_NETconnects to Nano D10. - ✅ Sensor terminals are documented as BRN/BLU/BLK and filters/status LEDs are included.
- ✅ Board size and 2-layer stackup are preserved.
- ❌ Final layout DRC is not clean: airwires and overlapping copper remain after the stricter spacing rule, so the board is not fabrication-ready yet.
Run routing cleanup/autoroute for the updated board, then re-check DRC until the airwire and copper-clearance issues are cleared. I can continue with PCB routing/cleanup guidance next.
Route sensor nets
Review DRC violations
Verify clearance rule
Prepare Gerbers
Update audit doc
2 days
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Jerky Robot V3 Control Board Implementation Plan
Goal
Implement the Jerky Robot V3 control board from
FLUX_COPILOT_PCB_SPEC.md as a 100 mm × 152 mm, 2-layer FR4 PCB for JLCPCB/PCBA.Required Architecture
- ESP32-S3-DevKitC-1 N16R8 socket/module interface.
- Arduino Nano socket/module interface.
- Screw-terminal I/O on board edges for 24 V input, 5 V input, X/Y stepper driver signals, X/Y sensors, HX711 cable, relay output, button box, AC contactor coil, spare expansion, SD card, and OLED.
- BSS138 level shifting for ESP32 ↔ Nano UART plus two spare BSS138 channels.
- PC817 optocoupler isolation for X/Y NPN photoelectric sensors.
- Optional HX711 load-cell ADC footprint/interface.
- 7 status LEDs and 6 labeled test points.
- 4× M3 plated mounting holes 5 mm from corners.
Critical Electrical Rules
- Shared GND across 5 V and 24 V domains; bottom layer is solid GND fill.
- Driver opto-input commons PUL+, DIR+, ENA+ connect to +5 V, not +24 V.
- ESP32 and Nano pin assignments must match firmware
config.hexactly. - Nano D12 / Z limit is intentionally unconnected.
PCB Constraints
- Board: 100 mm × 152 mm rectangular.
- Stackup: Standard 2 Layer / FR4 1.6 mm target.
- Components: top layer only.
- Bottom layer: continuous GND fill.
- Min trace/clearance: 0.2 mm.
- +24 V traces: ≥1.5 mm.
- +5 V traces: ≥1.0 mm.
- +3V3 traces: ≥0.5 mm.
- UART level-shifter traces: <30 mm target.
- HX711 analog area: keep away from relay; analog traces <50 mm if populated.
Execution Steps
- Create schematic components and document part selections.
- Wire all power, MCU, connector, level-shifter, optocoupler, HX711, LED, and test-point nets.
- Validate schematic and resolve ERC issues where possible.
- Configure PCB size, 2-layer stackup, and layout rules.
- Place components by functional floor plan with connectors at edges.
- Review DRC/ERC readiness and document any manual actions still required.
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