Pin Function Grouping and Datasheet Review

flux

Completed the datasheet review and grouped every STM32F103VET6 pin exactly once by primary function. The symbol pinout matches the LQFP100 datasheet table; I flagged metadata mismatches: package is set to TO instead of LQFP100, mount is Base, and part type could be more specific.
Full notes are in the project document: stm32f103vet6-part-review.
Suggested next steps:
  • Update package metadata to LQFP100 / SMD.
  • Optionally switch Datasheet URL to the VE-specific ST URL.
  • Run a deeper footprint land-pattern dimension check if you want pad geometry verified against the ST package drawing.
A

adrian95

  • Make the functional group more general.
  • Add a Section property to all pins, and apply the same value used in the Pin Group property to each pin's Section property.

flux

I’ll simplify the pin groups to broader functions and set every pin’s Section to exactly match its Pin Group.

flux

Updated the functional grouping to broader categories and set each pin’s Section to match its Pin Group.
Groups now used:
  • Power
  • Ground
  • Reference
  • Control
  • Clock
  • GPIO
  • No Connect
I spot-checked representative pins after the update and confirmed Section matches Pin Group.
Fix metadata and review
Fix part metadata
Use VE datasheet
Check footprint dimensions
Run ERC DRC
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Layout

3D View

STM32F103VET6 Part Review
Source
Key specs confirmed
  • Core: Arm Cortex-M3
  • Max CPU frequency: 72 MHz
  • Flash for STM32F103VET6: 512 KB
  • Package: LQFP100, 14 mm × 14 mm × 1.4 mm
  • Supply: 2.0 V to 3.6 V
  • Temperature range for T6 grade: -40 °C to +85 °C
  • Interfaces/features: USB, CAN, timers, ADCs, multiple serial interfaces per STM32F103 high-density family.
Symbol and pinout cross-check
The schematic symbol has 100 terminal components and the LQFP100 pin numbers match the datasheet pin table checked from pin 1 through pin 100. The one no-connect pin at LQFP100 pin 73 is present as NC.
Pin grouping applied
Each physical pin was assigned to exactly one primary functional group:
  • 3V3 Power: VDD_1, VDD_2, VDD_3, VDD_4, VDD_5
  • Analog Power: VDDA
  • Backup Power: VBAT
  • Ground: VSS_1, VSS_2, VSS_3, VSS_4, VSS_5
  • Analog Ground: VSSA
  • Analog Reference: VREF+, VREF-
  • Reset and Boot: NRST, BOOT0
  • Oscillator: OSC_IN, OSC_OUT
  • Low-Speed Oscillator: PC14-OSC32_IN, PC15-OSC32_OUT
  • GPIOA: PA0-WKUP, PA1-PA15
  • GPIOB: PB0-PB15
  • GPIOC: PC0-PC13-TAMPER-RTC; PC14/PC15 are grouped under Low-Speed Oscillator to avoid duplicate grouping
  • GPIOD: PD0-PD15
  • GPIOE: PE0-PE15
  • No Connect: NC
Footprint/package review
The PCB footprint contains 100 pads plus footprint shapes, consistent with an LQFP100 part at a high level. Exact pad geometry was not fully exposed in the layout inspection output, so the footprint was checked for pad count and naming rather than dimensional land-pattern compliance.
Mismatches / flags
  • Project property Package or Case Code is currently TO, which does not match the datasheet/orderable package. It should be LQFP100 / LQFP 100 14×14 mm.
  • Project property Mount is currently Base; for this package it should indicate surface-mount/SMD if the property is intended to describe mounting technology.
  • Project property Part Type is Integrated Circuits; a more specific value such as Microcontroller would better match the device.
  • Datasheet URL is official and valid for the STM32F103 high-density family, but the stm32f103ve.pdf path is the most directly named official URL for STM32F103VE/STM32F103VET6.

  • Source

  • Key specs confirmed

  • Symbol and pinout cross-check

  • Pin grouping applied

  • Footprint/package review

  • Mismatches / flags