Part Audit Review
Review all available part information (MPN, package, pin count, description, properties). If no datasheet URL is already set, search the web for the official datasheet and update the part's Datasheet property with the URL. Then cross-check the schematic symbol, footprint, and pin descriptions against the datasheet. Summarize key specs and flag any mismatches.
Thought for 13 sec
I’ll audit the part metadata, locate the official datasheet if needed, update the Datasheet property, then verify symbol pins and footprint geometry against the manufacturer documentation. I’ll record the detailed findings in a project report and summarize any critical mismatches here.
Worked for 7 mins 32 sec
Created a project doc
MC33390D Part Audit
The part is identifiable as MC33390D, an NXP/Freescale SAE J1850 Class B single-wire serial transceiver in an 8-lead narrow-body SOIC packag...
Audit complete. I added the official NXP datasheet, verified all eight pin names/numbers, and confirmed the SOIC-N footprint pitch and ordering.
Key issues: the footprint is incorrectly classified as through-hole despite using SMD pads; Package, Description, pin types, and pin descriptions are missing. I filed an internal part-quality report. Full findings: MC33390D Part Audit.
Fix metadata issues
Correct footprint attribute
Add pin metadata
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MC33390D Part Audit
Result
The part is identifiable as MC33390D, an NXP/Freescale SAE J1850 Class B single-wire serial transceiver in an 8-lead narrow-body SOIC package. The missing Datasheet property was populated from the official NXP datasheet source:
- Official source: https://www.nxp.com/docs/en/data-sheet/MC33390.pdf
- Datasheet document: MC33390, Rev. 7.0, 11/2006
- Flux may cache the imported PDF under a storage URL after ingestion.
Existing Part Information
Table
| Field | Existing value | Audit |
|---|---|---|
| MPN | MC33390D | Correct; corresponds to the D-suffix SOIC device |
| Manufacturer | NXP USA Inc. | Acceptable; datasheet is legacy Freescale, now NXP |
| Part type | Integrated Circuit | Correct but generic |
| Pin count | 8 | Correct |
| Package property | Missing | Mismatch/incomplete; should identify 8-SOICN / SOIC narrow body, package drawing 98ASB42564B |
| Description | Missing | Incomplete; suggested: “SAE J1850 Class B single-wire serial transceiver, 10.4 kbps VPWM, 8-SOICN” |
| Datasheet | Previously missing; now populated | Correct source used |
| Designator prefix | U | Correct |
| Lifecycle | Not represented in properties | NXP product page classifies the family as no longer manufactured |
Symbol and Pin Audit
The symbol has eight terminals and the pin numbers and names match the datasheet exactly.
Table
| Pin | Symbol name | Datasheet function | Name/number audit | Metadata audit |
|---|---|---|---|---|
| 1 | *SLEEP | Logic 1 enables; Logic 0 disables/sleeps | Functionally correct; asterisk conveys active-low convention but datasheet name is SLEEP | Pin Type is Unspecified; Pin Description absent |
| 2 | GND | Device ground | Correct | Pin Type should be power/ground; description absent |
| 3 | LOAD | External pull-down connection for loss-of-ground protection | Correct | Pin Type Unspecified; description absent |
| 4 | BUS | Waveshaped J1850 transmitter output and receiver input | Correct | Pin Type should indicate bidirectional; description absent |
| 5 | VBAT | Device operating supply | Correct | Pin Type should be power input; description absent |
| 6 | 4X/LOOP | Tristate mode input: normal, 4X, or loopback | Correct | Pin Type should be input; description absent |
| 7 | TX | MCU serial data input to transceiver | Correct | Pin Type should be input; description absent |
| 8 | RX | Received serial data output to MCU | Correct | Pin Type should be output; description absent |
Symbol findings
- Pass: pin count, numbering, and functional pin names.
- Incomplete: all terminal Pin Type values are
Unspecified. - Incomplete: all terminal Pin Description fields are absent.
- Minor naming difference: pin 1 is shown as
*SLEEP; the datasheet table calls itSLEEP, while its behavior is active-low for sleep/disable. This is understandable but should be documented consistently.
Footprint Audit
The footprint asset is named
F_MC33390D.kicad_mod, with value/model references indicating SO8. It contains eight SMD rectangular pads numbered 1 through 8.Datasheet package
- 8-lead SOIC narrow body / SOICN
- Package drawing: 98ASB42564B
- Lead pitch: 1.27 mm BSC
- Body length: 4.80–5.00 mm
- Body width: 3.80–4.00 mm
- Overall lead span: 5.80–6.20 mm
- Lead width: 0.33–0.51 mm
- Datasheet does not provide a recommended PCB land pattern.
Footprint geometry observed
- Pad pitch: 1.27 mm — matches datasheet.
- Eight pads in standard SOIC numbering order — matches symbol/datasheet mapping.
- Fab body outline is approximately 4.013 × 5.004 mm. This is essentially the expected narrow SOIC envelope, though the outline is marginally above the datasheet maximum by about 0.01 mm in each axis; this is negligible drafting tolerance rather than a solderability problem.
- Pads are approximately 1.4605 × 0.5588 mm, with pad-center row spacing about 5.4737 mm. The datasheet has no land pattern, so these cannot be directly certified from this document; they are plausible standard SOIC lands.
- Pin-1 markers are present.
Footprint mismatch
The KiCad footprint payload declares
(attr through_hole) even though all eight pads are SMD. This is inconsistent and may affect assembly classification or export behavior. The pad geometry itself remains SMD.3D Model
- Model asset:
SO8_FRE.step - Package family naming is consistent with SO-8.
- A dimensional/model alignment check could not be fully certified from metadata alone; the footprint remains the manufacturing source of truth.
Key Electrical Specifications
- Function: SAE J1850 Class B half-duplex single-wire serial transceiver
- Nominal data rate: 10.4 kbps, VPWM
- Full bus dynamics supply range: 9–16 V
- Parametric electrical-characteristic supply range: 7–16 V
- Communication can continue with reduced bus amplitude down to approximately 4.25 V VBAT
- Absolute maximum VBAT: -0.3 to 40 V
- MCU interface: standard 5 V CMOS
- BUS waveshaped output: approximately 0–7 V
- Operating ambient temperature: -40 to 125 °C
- Sleep current: 65 µA max
- BUS short-circuit current limiting and thermal shutdown included
- External series diode required for reverse-battery protection
- D-suffix ordering: MC33390D/DR2, 8-SOICN
- Device family is legacy/no longer manufactured according to the current NXP product page
Mismatches and Recommended Corrections
- Footprint classification: change the footprint attribute from through-hole to SMD.
- Package property: add
8-SOICN (SOIC narrow body), 98ASB42564B. - Description: add a concise functional description.
- Pin descriptions: populate all eight descriptions from the datasheet table.
- Pin types: assign ground/power/input/output/bidirectional types as appropriate.
- Lifecycle metadata: mark the part as obsolete/no longer manufactured if the library supports lifecycle properties.
- Pin 1 naming: retain
*SLEEPonly if the asterisk convention is intentional; otherwise useSLEEPand explain active-low sleep behavior in the description.
Overall Assessment
The part is electrically mappable and the critical pin numbering is correct. The main manufacturing metadata risk is the erroneous through-hole footprint attribute. The remaining issues are incomplete metadata rather than wrong connectivity or pad numbering.
Result
Existing Part Information
Symbol and Pin Audit
Symbol findings
Footprint Audit
Datasheet package
Footprint geometry observed
Footprint mismatch
3D Model
Key Electrical Specifications
Mismatches and Recommended Corrections
Overall Assessment
