ASM1061 Pin Audit


Check this schematic component against the datasheet for [MPN] and assign the correct pin orientation, section, and terminal order without changing, replacing, renumbering, or remapping any pins. Remove the Pin Group property from all pins if it exists. Place Power pins first and Ground pins last. Within each section, distribute the pins as evenly as possible between the left and right sides; for example, split 10 pins as 5/5 and 11 pins as 5/6 or 6/5. If a section contains only one pin, leave it on the most appropriate side. Keep the symbol compact, balanced, and visually symmetrical. If a pin function is unclear, assign Unclear / Check datasheet, then apply all changes directly to the schematic component.
I’ll apply this to the current ASM1061 part, preserving every pin number and mapping. I’ll organize pins into balanced functional sections, set orientation and terminal order, remove Pin Group everywhere, then verify the symbol metadata.
Created a project doc

Part Audit

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Part Audit Scope
Audit of the ASM1061 part metadata, datasheet, schematic terminals, footprint mapping, and symbol organization.
Part metadata Key specifications
  • PCI Express Gen2 x1 upstream interface, supporting 2.5 and 5 GT/s signaling.
  • Two SATA PHY ports supporting 1.5, 3.0, and 6.0 Gb/s.
  • Supports IDE/AHCI mode, NCQ, port multiplier, SSC, ECRC, and Advanced Error Reporting.
  • External 20 MHz crystal and 100 MHz PCI Express reference clock.
  • Supports a 64 KB SPI flash for option ROM.
  • Integrated 3.3 V to 1.25 V switching regulator.
  • 3.3 V rails: 3.0 to 3.6 V recommended.
  • 1.25 V rails: 1.20 to 1.30 V recommended.
  • Operating junction temperature: 0 to 120 C; case temperature: 25 to 85 C.
  • PREXT and SREXT each require a 12.1 kOhm reference resistor to ground.
Applied the ASM1061 symbol organization directly: all 49 pin mappings and numbers were preserved, Pin Group was removed, and balanced sections/orientations with unique terminal orders were assigned—Power first and Ground last.
Key findings and specifications are documented in Part Audit. Main flags: all pin types remain Unspecified, pin descriptions are missing, and exposed pad 49 is not explicitly defined in the QFN-48L datasheet.
Complete pin metadata
Resolve exposed pad
Audit footprint geometry
Improve part description

PCB layout of ASM1061

ASM1061