ESP32-S3 PLC Architecture Discussion
Worked for 15 mins 44 sec
Completed the final schematic-gate pass and updated Schematic Review Before Layout. D29 is verified, L2 is now a confirmed shielded Sumida inductor, and U8/U9 FAULT is routed to ESP32 GPIO15 with a 10kΩ pull-up; ERC remains clean.
Open items:
- Layout is still not approved: HR911105A symbol-footprint mapping remains Must Fix because the Flux symbol/footprint readout is ambiguous versus the datasheet.
Suggested next steps:
- Replace HR911105A with a clearly numbered MagJack part/footprint, or manually verify its symbol-footprint mapping.
- After that, update the approval table to “Pass” and proceed to PCB placement.
HOW TO DOWNLOAD SCHEMATIC AS PDF OR AS A ALTIUM PROJECT?
Thought for 8 sec
In Flux, use the Export options from the project UI:
- Open your project.
- Click Export / download from the top toolbar or project menu.
- Choose:
- PDF for schematic/documentation output.
- Altium if available in your export list; otherwise export standard manufacturing/interchange formats such as Gerber, ODB++, IPC-2581, BOM, and Pick-and-Place.
If you don’t see an Altium export option, Flux may not support direct Altium project export for this project. For help from Flux support, use: https://docs.flux.ai/Introduction/getting-support.
Export and verify files
Export schematic PDF
Export BOM files
Generate manufacturing files
Create export checklist
Thought for 3 sec
Refine this doc
Ask about this doc
Schematic Review Before Layout
Project: ESP32-S3 Industrial PLC Controller
Review scope: schematic only; no PCB placement, routing, DRC, or airwire work performed.
Latest update: 2026-06-23
Latest ERC status: clean for open ERC errors/warnings at 2026-06-23T13:16:15.008Z.
Review scope: schematic only; no PCB placement, routing, DRC, or airwire work performed.
Latest update: 2026-06-23
Latest ERC status: clean for open ERC errors/warnings at 2026-06-23T13:16:15.008Z.
1. Final Schematic Approval Gate
Table
| Item | Status | Notes | Human verification required |
|---|---|---|---|
| HR911105A MagJack symbol-footprint mapping | Must Fix | Could not honestly mark “HR911105A symbol-footprint mapping verified.” The current Flux symbol uses duplicate ~ pins and the schematic/footprint pads are not human-readable by pin number. The LCSC/HanRun extraction gives pin 1=TD+, 2=TD−, 3=RD+, 4=TCT, 5=RCT, 6=RD−, 8=CHS GND, 9=Green LED anode, 10=Green LED cathode, 11=Yellow LED cathode, 12=Yellow LED anode. Current schematic net inspection shows J3 pin identities by UUID and does not prove the physical pad numbering/orientation matches the datasheet. Do not start layout until the exact HR911105A symbol and footprint pad numbering are visually verified or the MagJack part is replaced with a clearly numbered symbol/footprint. | Yes |
| D29 SM712-02HTG symbol-footprint mapping | Pass | D29 is SM712-02HTG, an asymmetrical RS485 TVS diode array in SOT23-3. Datasheet extraction confirms pins 1 and 2 are the RS485 line pins and pin 3 is the reference/common pin; schematic wires pin 1 to RS485_A, pin 2 to RS485_B, and pin 3 to ISO_GND. Layout footprint exposes pads 1/2/3 matching the schematic pin numbers. Note added: “D29 symbol-footprint mapping verified.” | No |
| L2 shielded inductor production resolution | Pass | L2 was changed from FXL0630-6R8-M to Sumida CDRH103RNP-6R8NC-B: 6.8uH, confirmed shielded, 3.6A rating, 35mΩ max DCR, production-available in Flux search. This is acceptable for the documented +3V3 rail current of 0.542A. Do not assume continuous 3A output capability without recalculating peak inductor current. | No |
| TPS4H160 diagnostic decision | Pass | For the base PLC unit, detailed diagnostics are not consuming many GPIOs. U8/U9 open-drain FAULT pins are combined on DO_FAULT_N, pulled up to +3V3 through R69=10kΩ, probed at TP37, and routed to ESP32 GPIO15. THER was not tied into the MCU line because the datasheet defines THER as a behavior-control input, not a fault output; THER remains defined low for auto-retry behavior. CS pins remain terminated through R64/R65=1kΩ to GND. DIAG_EN/SEL/SEH/CL remain defined low. | No |
| DO outputs OFF during boot/reset | Pass | DO control inputs DO1_CTRL-DO8_CTRL remain tied to ESP32 outputs with 100kΩ pulldowns R14-R21 to GND. This keeps TPS4H160 INx low during ESP32 reset/boot so outputs remain off. | No |
| Schematic ERC | Pass | Full ERC open-error/open-warning query returned no matching checks after the latest changes. | No |
Layout approval status: Not approved for layout yet because HR911105A symbol-footprint mapping remains a Must Fix item.
2. Work Completed in Latest Pass
2.1 D29 footprint verification
- Function: RS485 A/B surge/ESD protection on the isolated side.
- Exact part: SM712-02HTG.
- Datasheet facts captured:
- Reverse standoff: pin 3 to pin 1 or 2 = 7.0V; pin 1 or 2 to pin 3 = 12.0V.
- Package: SOT23-3.
- Marking: 712.
- Pins 1/2 are the two protected RS485 lines; pin 3 is the common/reference pin.
- Schematic connection:
- D29 pin 1 -> RS485_A.
- D29 pin 2 -> RS485_B.
- D29 pin 3 -> ISO_GND.
- PCB footprint check from layout tree:
- D29 footprint exposes pads 1, 2, and 3 matching the symbol pin numbers.
- Note: D29 symbol-footprint mapping verified.
2.2 L2 inductor resolution
Previous L2 used FXL0630-6R8-M, which met current margin but did not confirm shielding. L2 is now documented as:
Table
| Property | Value |
|---|---|
| Manufacturer | Sumida |
| MPN | CDRH103RNP-6R8NC-B |
| Inductance | 6.8uH |
| Shielding | Shielded |
| Current rating | 3.6A |
| DCR | 35mΩ max |
| Package | SMD_SRR1260 |
| Selection basis | Actual +3V3 rail current = 0.542A, TPS54302 recommended value = 6.8uH |
2.3 TPS4H160 diagnostic routing
- Added R69 = 10kΩ pull-up from DO_FAULT_N to +3V3.
- Added TP37 test point on DO_FAULT_N.
- Routed U8
~FAULT, U9~FAULT, R69, TP37, and ESP32 GPIO15 together on DO_FAULT_N. - Datasheet basis:
- FAULT is open-drain and requires a 3.3V or 5V pull-up.
- THER is an input selecting thermal shutdown behavior; keeping it low selects auto-retry mode.
- DIAG_EN, SEL, SEH, and THER have internal pulldowns; in this schematic they are also held low by the GND net.
- CS pins are analog/current-sense outputs on version B; this design terminates them via 1kΩ to GND rather than leaving them floating.
3. HR911105A MagJack Layout-Blocking Note
The HR911105A remains layout-blocking because the Flux symbol uses duplicate
~ pin names and the available footprint tree exposes duplicate pad names rather than clear numeric pad labels in the readout. The datasheet extraction used for this pass says:Table
| Datasheet pin | Function |
|---|---|
| 1 | TD+ |
| 2 | TD− |
| 3 | RD+ |
| 4 | TCT |
| 5 | RCT |
| 6 | RD− |
| 7 | NC |
| 8 | CHS GND |
| 9 | Green LED anode |
| 10 | Green LED cathode |
| 11 | Yellow LED cathode |
| 12 | Yellow LED anode |
Required before layout:
- Open the exact HR911105A symbol and footprint side-by-side.
- Verify symbol pin numbers 1-12 and shield pins against the datasheet.
- Verify PCB pad numbering and physical orientation against the footprint drawing.
- Confirm MDI mapping to W5500 and ESD device:
- W5500 TXP/TXN must reach MagJack TD+/TD−.
- W5500 RXP/RXN must reach MagJack RD+/RD−.
- TCT/RCT center taps must be tied as required by the W5500 reference circuit.
- Confirm LED polarity and W5500 LED sink/source behavior.
- Only then add the note: “HR911105A symbol-footprint mapping verified.”
4. Current GPIO Map Delta
Table
| ESP32-S3 GPIO | Net / Function | Direction | Notes |
|---|---|---|---|
| GPIO15 | DO_FAULT_N | Input | Combined open-drain U8/U9 FAULT diagnostic, pulled up by R69 to +3V3, active low. |
All previous GPIO assignments remain as documented in the earlier schematic review.
5. Remaining Before Layout
- Must fix: HR911105A symbol-footprint mapping verification or replace the MagJack with a clearly numbered equivalent.
- Optional but recommended: add explicit assembly notes for RS485 R66/R67/R68 population options.
- Optional but recommended: decide whether the base unit should expose DO_FAULT_N on a labeled external/test header in addition to TP37.
1. Final Schematic Approval Gate
2. Work Completed in Latest Pass
2.1 D29 footprint verification
2.2 L2 inductor resolution
2.3 TPS4H160 diagnostic routing
3. HR911105A MagJack Layout-Blocking Note
4. Current GPIO Map Delta
5. Remaining Before Layout
