ESP32-S3 PLC Architecture Discussion
Worked for 15 mins 44 sec
Completed the final schematic-gate pass and updated Schematic Review Before Layout. D29 is verified, L2 is now a confirmed shielded Sumida inductor, and U8/U9 FAULT is routed to ESP32 GPIO15 with a 10kΩ pull-up; ERC remains clean.
Open items:
- Layout is still not approved: HR911105A symbol-footprint mapping remains Must Fix because the Flux symbol/footprint readout is ambiguous versus the datasheet.
Suggested next steps:
- Replace HR911105A with a clearly numbered MagJack part/footprint, or manually verify its symbol-footprint mapping.
- After that, update the approval table to “Pass” and proceed to PCB placement.
HOW TO DOWNLOAD SCHEMATIC AS PDF OR AS A ALTIUM PROJECT?
Thought for 8 sec
In Flux, use the Export options from the project UI:
- Open your project.
- Click Export / download from the top toolbar or project menu.
- Choose:
- PDF for schematic/documentation output.
- Altium if available in your export list; otherwise export standard manufacturing/interchange formats such as Gerber, ODB++, IPC-2581, BOM, and Pick-and-Place.
If you don’t see an Altium export option, Flux may not support direct Altium project export for this project. For help from Flux support, use: https://docs.flux.ai/Introduction/getting-support.
Export and verify files
Export schematic PDF
Export BOM files
Generate manufacturing files
Create export checklist
Thought for 3 sec
Refine this doc
Ask about this doc
ESP32-S3 Industrial PLC Controller — GPIO Map
Locked GPIO allocation
Table
| Function | ESP32-S3 GPIO | Net / connection | Notes |
|---|---|---|---|
| USB D- | GPIO19 | USB_D_N | Native ESP32-S3 USB. |
| USB D+ | GPIO20 | USB_D_P | Native ESP32-S3 USB. |
| W5500 SCLK | GPIO12 | W5500_SCLK | SPI clock. |
| W5500 MOSI | GPIO11 | W5500_MOSI | SPI MOSI. |
| W5500 MISO | GPIO13 | W5500_MISO | SPI MISO. |
| W5500 CS | GPIO10 | W5500_CS | SPI chip select. |
| W5500 INT | GPIO14 | W5500_INT | Interrupt input to ESP32. |
| W5500 RESETn | none | W5500_RESET_N | Hardware RC only: 10k pull-up to +3V3, 100nF to GND. No dedicated ESP32 GPIO. |
| RS485 TX | GPIO17 | RS485_TXD | ESP32 UART TX to ISO1410 D. |
| RS485 RX | GPIO18 | RS485_RXD | ISO1410 R to ESP32 UART RX. |
| RS485 DE/~RE | GPIO16 | RS485_DE_RE | Shared direction-control line. |
| DI1 | GPIO1 | DI1_MCU | PC817 output, active-low. |
| DI2 | GPIO2 | DI2_MCU | PC817 output, active-low. |
| DI3 | GPIO4 | DI3_MCU | PC817 output, active-low. |
| DI4 | GPIO5 | DI4_MCU | PC817 output, active-low. |
| DI5 | GPIO6 | DI5_MCU | PC817 output, active-low. |
| DI6 | GPIO7 | DI6_MCU | PC817 output, active-low. |
| DI7 | GPIO8 | DI7_MCU | PC817 output, active-low. |
| DI8 | GPIO9 | DI8_MCU | PC817 output, active-low. |
| DO1 control | GPIO21 | DO1_CTRL | TPS4H160 input, 100k pulldown. |
| DO2 control | GPIO38 | DO2_CTRL | TPS4H160 input, 100k pulldown. |
| DO3 control | GPIO39 | DO3_CTRL | TPS4H160 input, 100k pulldown. |
| DO4 control | GPIO40 | DO4_CTRL | TPS4H160 input, 100k pulldown. |
| DO5 control | GPIO41 | DO5_CTRL | TPS4H160 input, 100k pulldown. |
| DO6 control | GPIO42 | DO6_CTRL | TPS4H160 input, 100k pulldown. |
| DO7 control | GPIO47 | DO7_CTRL | TPS4H160 input, 100k pulldown. |
| DO8 control | GPIO48 | DO8_CTRL | TPS4H160 input, 100k pulldown. |
Reserved / avoided pins
- GPIO0: BOOT only.
- GPIO3: avoided.
- GPIO15: spare GPIO.
- GPIO35, GPIO36, GPIO37: avoided.
- GPIO43, GPIO44: spare/debug UART if possible.
- GPIO45, GPIO46: strapping pins with pull-downs; avoided for application I/O.
Notes
- W5500 reset is hardware-controlled only; no dedicated ESP32 GPIO is allocated.
- DI channels use PC817 transistor outputs with 10k pull-ups to
+3V3; logic is active-low when the field input is ON. - DO control lines each have a 100k pulldown so high-side outputs stay OFF during ESP32 reset/boot.
- TPS4H160 diagnostic/current-sense functions are not fully used in the current prototype wiring; final diagnostic strategy should be revisited before production layout.
Locked GPIO allocation
Reserved / avoided pins
Notes
