ESP32-S3 PLC Architecture Discussion


Completed the final schematic-gate pass and updated Schematic Review Before Layout. D29 is verified, L2 is now a confirmed shielded Sumida inductor, and U8/U9 FAULT is routed to ESP32 GPIO15 with a 10kΩ pull-up; ERC remains clean.
Open items:
  • Layout is still not approved: HR911105A symbol-footprint mapping remains Must Fix because the Flux symbol/footprint readout is ambiguous versus the datasheet.
Suggested next steps:
  1. Replace HR911105A with a clearly numbered MagJack part/footprint, or manually verify its symbol-footprint mapping.
  2. After that, update the approval table to “Pass” and proceed to PCB placement.
HOW TO DOWNLOAD SCHEMATIC AS PDF OR AS A ALTIUM PROJECT?
In Flux, use the Export options from the project UI:
  1. Open your project.
  2. Click Export / download from the top toolbar or project menu.
  3. Choose:
    • PDF for schematic/documentation output.
    • Altium if available in your export list; otherwise export standard manufacturing/interchange formats such as Gerber, ODB++, IPC-2581, BOM, and Pick-and-Place.
If you don’t see an Altium export option, Flux may not support direct Altium project export for this project. For help from Flux support, use: https://docs.flux.ai/Introduction/getting-support.
Export and verify files
Export schematic PDF
Export BOM files
Generate manufacturing files
Create export checklist

ESP32-S3 Industrial PLC Controller — Final Power Budget Before Schematic Capture
Purpose
This file locks the pre-schematic power budget required before drawing the detailed schematic. It verifies whether the selected TI LMR51610XDBVR/XFDBVR 1 A buck regulator has at least 30% output-current margin for the +5V rail.
Locked architecture for this budget
  • +24V_PROT → buck regulator → +5V
  • +5V → +3V3 regulator → ESP32-S3, W5500, logic
  • +5V → Mornsun B0505S-1WR3 → ISO_5V / ISO_GND
  • ISO_5V powers the ISO1410 isolated RS485 field side.
  • ISO_GND remains isolated from normal GND.
Datasheet/current assumptions used

Table


Load / itemSource basisCurrent used
ESP32-S3-WROOM-1 peak currentESPressif datasheet search: Wi-Fi TX peak, 802.11b 1 Mbps @ 20.5 dBm355 mA @ 3.3 V
W5500 currentWIZnet W5500 datasheet search: normal operation at 3.3 V132 mA @ 3.3 V
ISO1410 isolated field sideTI ISO1410 datasheet search: 500 kbps, 54 Ω load, 50 pF, 5 V160 mA @ ISO_5V
B0505S-1WR3 input currentMornsun datasheet search: full-load input current max257 mA @ +5V
TPS4H160 logic-side GPIO driveTI datasheet search: no separate VDD logic rail; logic pins use pulldowns~2 mA @ 3.3 V allowance
8 DI optocoupler logic outputsConservative pull-up/pull-down and GPIO leakage allowance8 mA @ 3.3 V
LEDs and test circuitsPrototype indicator/test allowance40 mA @ +5V / +3V3 combined allowance
Miscellaneous 3.3 V logic marginPullups, reset circuits, level/control signals25 mA @ 3.3 V
Rail budget
+3V3 rail loads

Table


+3V3 loadPeak current
ESP32-S3-WROOM-1-N16R8355 mA
W5500 Ethernet controller132 mA
8 DI logic-side opto outputs8 mA
TPS4H160 control/diagnostic GPIO allowance2 mA
Miscellaneous pullups/control logic25 mA
Status LEDs allocated to 3.3 V side20 mA
Total +3V3 peak542 mA
If +3V3 is generated by an LDO from +5V, input current is approximately equal to output current:
I_+5V_for_3V3 ≈ 542 mA
LDO thermal note:
P_LDO ≈ (5.0 V − 3.3 V) × 0.542 A = 0.92 W
That is too high for a small SOT-23/SOT-223 class regulator without substantial copper and thermal review. A 3.3 V buck or high-current thermal-capable regulator should be considered for production reliability.
Direct +5V loads

Table


+5V loadPeak current
Mornsun B0505S-1WR3 input at worst-case ISO1410 load/full load257 mA
+5 V status/test allowance20 mA
USB/power-path/control overhead allowance10 mA
Direct +5V peak excluding +3V3 regulator287 mA
Total +5V buck output current
Assuming a 5 V to 3.3 V LDO:
I_+5V_total_peak = 542 mA + 287 mA = 829 mA
LMR51610 margin check
LMR51610 rating: 1 A continuous output current.
Required 30% current margin means the design load must be no more than:
1.0 A / 1.30 = 0.769 A
Calculated peak load:
0.829 A
Actual margin:
(1.0 A − 0.829 A) / 0.829 A = 20.6%
Decision
LMR51610 does not meet the requested 30% current margin under this conservative budget.
Do not start schematic capture with LMR51610 as the locked buck unless one of these changes is made:
  1. Replace the +5 V buck with a higher-current 60–65 V industrial buck, or
  2. Reduce the +5 V load by using a more efficient rail plan and re-running the budget, or
  3. Accept less than 30% margin, which is not recommended for this PLC prototype.

Table


CandidateRatingWhy it fitsNotes
TI LMR516254.3–60 V, 2.5 A synchronous buckSame modern family direction; enough current margin for +5 V railPreferred next candidate if library/sourcing available.
TI LMR516354.3–60 V, 3.5 A synchronous buckLarge margin; closer replacement for TPS54360 current capability but newer/synchronousUse if added loads or high thermal margin desired.
TI LMR16020 / LMR16030 class60 V, 2–3 A classOlder but suitable 24 V industrial buck familyBackup if LMR51625/635 unavailable.
Original TPS54360DDA60 V, 3.5 AElectrically safe current marginCost/size overkill, but acceptable fallback.
Preferred pre-schematic decision
Use TI LMR51625 as the new preferred 24 V-to-5 V buck candidate, pending datasheet/library confirmation. It gives:
2.5 A / 0.829 A = 3.0× load capacity
Equivalent current margin:
(2.5 A − 0.829 A) / 0.829 A ≈ 202%
This comfortably exceeds the required 30% margin while avoiding the original oversized/costly TPS54360DDA direction.
Schematic capture impact
Before drawing the power tree, update the locked component list:
  • Replace LMR51610XDBVR/XFDBVR with LMR51625 unless sourcing/library checks fail.
  • Keep Mornsun B0505S-1WR3, ISO1410, W5500, 8× PC817, and 2× TPS4H160BQPWPRQ1 unchanged.
  • Consider a 3.3 V buck or thermally robust 3.3 V regulator because the estimated 3.3 V load can make a 5 V-to-3.3 V LDO dissipate about 0.92 W at peak.
  • Purpose

  • Locked architecture for this budget

  • Datasheet/current assumptions used

  • Rail budget

  • +3V3 rail loads

  • Direct +5V loads

  • Total +5V buck output current

  • LMR51610 margin check

  • Decision

  • Recommended higher-current buck alternatives

  • Preferred pre-schematic decision

  • Schematic capture impact