Part Metadata Review and Datasheet Update


Updated the STDRIVE102BP metadata and terminals:
  • Set project part metadata:
    • Part Type: Gate Driver
    • Package or Case Code: VFQFPN-48 6x6x0.9 mm
    • Added implementation note: 48 leads + exposed thermal pad = 49 pads
  • Populated Pin Description and normalized Pin Type for all 49 terminals.
  • Corrected power pins to Flux-standard types like Power In / Power Out.
  • Verified the schematic properties were applied.
  • Ran component/missing-footprint review checks: no open warnings or errors found.
One caveat: the library search index still reports the old package value “TO” and blank Part Type, which may be stale or may require part-library-level property publishing beyond the editable project metadata. The active project terminals and project-level metadata are now corrected.
add also section for all the terminal based on the datasheet.
I’ll add a datasheet-based Section property to every terminal, grouping pins by function, then verify the updates.
Added the Section property to all 49 STDRIVE102BP terminals, grouped by datasheet function: SPI Interface, Analog Front End/PGA blocks, Power Supplies, Charge Pump/Bootstrap, Half-Bridge driver groups, Control Inputs, Diagnostics/Protection, and Ground/Exposed Pad.
Verified the Section values are present on every terminal and ran the relevant component review checks: no open warnings or errors found.
Run full checks
Normalize section names
Verify footprint pads
Create review document
Update library metadata

Name
Pin #
Type
Part Type
Pin Description
Section
CLK
1
Input
Terminal
SPI serial clock input.
SPI Interface
NCS
2
Input
Terminal
SPI chip-select input, active low.
SPI Interface
SDO
3
Output
Terminal
SPI serial data output.
SPI Interface
SDI
4
Input
Terminal
SPI serial data input.
SPI Interface
C_AUX
5
Passive
Terminal
Auxiliary internal supply/reference capacitor connection; connect external capacitor as specified in the application circuit.
Analog Front End / References
PGA_O1
6
Output
Terminal
Programmable-gain amplifier 1 output.
Analog Front End / PGA 1
PGA_IN1N
7
Input
Terminal
Programmable-gain amplifier 1 negative input.
Analog Front End / PGA 1
PGA_IN1P
8
Input
Terminal
Programmable-gain amplifier 1 positive input.
Analog Front End / PGA 1
PGA_O2
9
Output
Terminal
Programmable-gain amplifier 2 output.
Analog Front End / PGA 2
PGA_IN2N
10
Input
Terminal
Programmable-gain amplifier 2 negative input.
Analog Front End / PGA 2
PGA_IN2P
11
Input
Terminal
Programmable-gain amplifier 2 positive input.
Analog Front End / PGA 2
AGND
12
Ground
Terminal
Analog ground reference for analog front-end circuitry.
Ground / Exposed Pad
PGA_O3
13
Output
Terminal
Programmable-gain amplifier 3 output.
Analog Front End / PGA 3
PGA_IN3N
14
Input
Terminal
Programmable-gain amplifier 3 negative input.
Analog Front End / PGA 3
PGA_IN3P
15
Input
Terminal
Programmable-gain amplifier 3 positive input.
Analog Front End / PGA 3
CREF
16
Passive
Terminal
Reference voltage/filter capacitor connection; connect external capacitor to ground per datasheet.
Analog Front End / References
VDD
17
Power Out
Terminal
3.3 V logic supply output from internal regulator / logic supply rail; decouple to ground.
Power Supplies / Regulators
REGIN_3V3
18
Power In
Terminal
Input supply for the embedded 3.3 V regulator.
Power Supplies / Regulators
VM
19
Power In
Terminal
Motor/battery supply voltage input used by the power stage monitoring circuitry.
Power Supplies / Motor Supply
VBOOT
20
Power Out
Terminal
Charge-pump/bootstrap high-side driver supply node; connect external capacitor per datasheet.
Charge Pump / Bootstrap
PCAP
21
Passive
Terminal
Charge-pump flying/reservoir capacitor positive terminal.
Charge Pump / Bootstrap
NCAP
22
Passive
Terminal
Charge-pump flying/reservoir capacitor negative terminal.
Charge Pump / Bootstrap
VS
23
Power In
Terminal
Main device supply input for gate-driver/regulator circuitry; operating range 6 V to 50 V.
Power Supplies / Main Supply

STDRIVE102BP