Part Data Review and Verification

Reviewed the CH9102X part data and cross-checked it against the WCH CH9102 datasheet.
What I found
  • MPN: CH9102X — matches project metadata.
  • Manufacturer: WCH — matches.
  • Package: QFN28X5, 5 × 5 mm, 0.5 mm pitch, exposed GND pad — project only says QFN, so it should be made more specific.
  • Datasheet: Already set, so I did not overwrite it.
  • Symbol pin mapping: Pins 1–28 match the datasheet pin names and order.
  • Footprint: 28 perimeter pads plus an exposed GND pad are present, matching the QFN28 + EP requirement at a high level.
Key specs
  • USB 2.0 Full-Speed, 12 Mbps
  • UART baud rate: 50 bps to 4 Mbps
  • CH9102X UART I/O: 3.3 V logic
  • Supply: 5 V via VDD5 with internal 3.3 V regulator, or 3.3 V with VDD5 tied to V3
  • Operating temperature: −40 °C to +85 °C
  • No external crystal required
Mismatches / issues flagged
  • The exposed pad is represented as GND pin 29, but the datasheet defines it as pin 0 / exposed GND pad. Electrically OK, but the pin number should ideally be corrected.
  • All symbol terminals are currently marked Bi-Directional; datasheet-specific types should be applied instead: power, input, output, USB, I/O, NC.
  • Package metadata should be updated from generic QFN to QFN28X5 / 5×5 mm / 0.5 mm pitch / exposed pad.
  • NC pins 13–15 should be clearly marked NC and left floating.
Set each terminal’s electrical type according to the datasheet instead of Bi-Directional.
I’ll update each CH9102X terminal’s Pin Type from Bi-Directional to the datasheet-defined type, then re-read the schematic to verify the changes.
Updated and verified the CH9102X terminal electrical types against the datasheet.
  • Inputs: DCD, RI, VBUS, RST#, CTS, RXD, DSR
  • Outputs: ACT#, SUSPEND#, SUSPEND, RTS, TXD, DTR
  • Power/Ground: VDD5 and both V3 pins set to Power In; both GND pins set to Ground
  • USB: UD+ and UD− set to Signal
  • NC pins 13–15 set to Not Connected
  • GPIO/status multifunction pins remain Bi-Directional because the datasheet defines them as I/O.
Fix metadata, review
Fix package metadata
Correct exposed pad
Run ERC DRC
Add pin descriptions
TXD
Pin Number
26
DTR
Pin Number
28
RTS
Pin Number
24
V3
Pin Number
22
RXD
Pin Number
25
GND
Pin Number
29
DSR
Pin Number
27
CTS
Pin Number
23


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CH9102X

CH9102X thumbnail
The CH9102X is a high-speed USB-to-UART bridge IC developed by WCH (Jiangsu Qinheng Microelectronics). It enables seamless communication between a USB host and UART-based embedded systems, making it ideal for programming, debugging, firmware updates, and serial data communication. The device integrates a USB 2.0 Full-Speed interface, an internal clock, power-on reset, and firmware, eliminating the need for an external crystal oscillator. The CH9102X variant supports 3.3 V UART I/O and is widely used on development boards such as ESP32 and other MCU-based designs.
Key Features USB 2.0 Full-Speed (12 Mbps) compliant device interface USB-to-UART bridge supporting baud rates from 50 bps to 4 Mbps 3.3 V UART I/O (CH9102X variant) Integrated clock oscillator (no external crystal required) Built-in power-on reset circuit Hardware full-duplex UART with independent TX/RX buffers Supports 5, 6, 7, or 8 data bits Supports None, Odd, Even, Mark, and Space parity Supports RTS/CTS hardware flow control Supports MODEM signals: RTS, CTS, DTR, DSR, DCD, and RI TNOW output for automatic RS-485 transmit/receive control Compatible with built-in CDC drivers and vendor VCP drivers on major operating systems Available in compact RoHS-compliant QFN packages

Properties

CH9102X

WCH

Integrated Circuits

IC

QFN28X5 5x5mm 0.5mm pitch with exposed pad

parametric-v1

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