Part Information Review and Datasheet Analysis
4:25
Analy.
Checking.
Review.
Planning.
Extract.
Analyzing the schematic.
Checking the bill of materials.
Looking for "Features" in ADNS-9800.pdf
Looking for "Absolute Maximum Ratings" in ADNS-9800.pdf
Looking for "Recommended Operating Conditions" in ADNS-9800.pdf
Looking for "Electrical Characteristics" in ADNS-9800.pdf
Looking for "Pin assignment" in ADNS-9800.pdf
Looking for "Pin descriptions" in ADNS-9800.pdf
Looking for "Pinout" in ADNS-9800.pdf
Looking for "Package dimensions" in ADNS-9800.pdf
Looking for "Mechanical dimensions" in ADNS-9800.pdf
Looking for "Package outline" in ADNS-9800.pdf
Looking for "SPI timing characteristics" in ADNS-9800.pdf
Looking for "Power supply requirements" in ADNS-9800.pdf
Looking for "VCSEL control" in ADNS-9800.pdf
Analyzing the PCB layout.
Here’s a step-by-step execution of your request.
- Review of available part information in this project
- MPN: ADNS-9800
- Manufacturer: Avago Technologies
- Part type: Sensors
- Part project name: ADNS-9800
- Datasheet URL: https://componentsearchengine.com/Datasheets/1/ADNS-9800.pdf
- Symbol: Present (16 pins represented as terminals; all pins currently have Pin Type = Unspecified in symbol properties)
- Footprint: Present as “defaultFootprint” with 16 pads named to match the symbol pins
- Noted symbol pins (by number from the symbol properties): 1..16 assigned and named; see cross-check section for mapping
- Datasheet check and add/update
- A datasheet URL is already set on this part. No changes required.
- Datasheet scan and metadata extraction (verbatim values from the datasheet)
Key features
- Small form factor chip-on-board package
- Dual power supply selections, 3 V or 5 V
- VDDIO range: 1.65 – 3.3 V
- 16-bits motion data registers
- High speed motion detection up to 150 ips and acceleration up to 30 g
- Advanced technology 832–865 nm wavelength VCSEL; single mode lasing; no laser power calibration needed
- Eye safety: IEC/EN 60825-1 Class 1; on-chip laser fault detect
- Self-adjusting frame rate; motion detect pin; internal oscillator
- Enhanced programmability: frame rate up to 12,000 fps; 1 to 5 mm lift detection; resolution up to 8200 cpi (~200 cpi steps); independent X/Y resolution; Rest modes with sleep/wake times
Absolute maximum ratings
- Storage temperature (TS): -40 to 85 °C
- Lead-free solder temp: 255 °C (10 s, 1.8 mm below seating plane)
- Supply voltages:
- VDD5: -0.5 to 5.5 V
- VDD3: -0.5 to 3.4 V
- VDDIO: -0.5 to 3.4 V
- ESD (HBM): 2 kV (all pins)
- Input voltage (all I/O): -0.5 to VDDIO + 0.5 V
- Laser output power limit (LOPmax): 716 µW (Class 1)
- VCSEL DC forward current (IF): up to 7 mA (max duration 240 hrs)
- VCSEL reverse voltage (VR): up to 5 V (I = 10 µA)
Recommended operating conditions
- Operating temperature (TA): 0 to 40 °C
- VDD5: 4.0 V min, 5.0 V typ, 5.25 V max (including supply noise)
- VDD3: 2.7 V min, 2.8 V typ, 3.3 V max (including supply noise)
- VDDIO: 1.65 V min to 3.3 V max (including noise)
- Power supply rise time: 1 ms to 100 ms (both 5 V and 3 V modes)
- Supply noise (sinusoidal): up to 100 mVp‑p (50 kHz – 50 MHz)
- Serial port clock frequency (fSCLK): up to 2 MHz (50% duty)
- Z-height (lens reference plane to surface): 2.18 mm min, 2.40 mm typ, 2.62 mm max
- Speed up to 150 ips; acceleration up to 30 g (Run mode only)
- Load capacitance: up to 100 pF (MOTION, MISO)
- Frame rate: up to 12,000 fps
- VCSEL peak wavelength: 832 to 865 nm
- Operating laser output power (with ADNS-6190-002 lens, internally driven): 506 µW (typ)
Selected electrical characteristics
- DC supply current (3 V mode):
- Variable frame rate SROM low: 18 mA min, 20 mA typ
- Variable frame rate SROM med: 24.5 mA min, 27.5 mA typ
- Variable frame rate SROM high: 33 mA min, 45 mA max
- IDD_RUN3: 33 mA min, 45 mA max
- DC supply current (5 V mode): IDD_RUN5: 36 mA min, 50 mA max
- Peak supply current: 60 mA (3 V), 65 mA (5 V)
- Shutdown supply current: 45 mA min, 85 mA max (NCS, SCLK, MOSI = VDDIO; MISO = GND)
- REFB output voltage: 2.85 V min, 3.05 V typ, 3.25 V max (note: do not use as supply for other chips except integrated VCSEL and VDDIO)
- Digital I/O thresholds (relative to VDDIO):
- VIL: 0.3·VDDIO
- VIH: 0.7·VDDIO
- VOL (MISO, MOTION): 0.3·VDDIO at Iout = 1 mA
- VOH (MISO, MOTION): 0.7·VDDIO at Iout = -1 mA
- LASER_NEN output thresholds (relative to VREFB):
- VOL: 0.3·VREFB (Iout = 1 mA)
- VOH: 0.7·VREFB (Iout = -0.5 mA)
- Input capacitance: 10 pF (MOSI, NCS, SCLK)
Selected AC/timing characteristics (SPI and control)
- fSCLK: up to 2 MHz
- MISO rise/fall time: 50 to 200 ns (CL = 100 pF)
- MISO delay after SCLK falling: 120 ns
- MISO hold time: 200 ns
- MOSI setup/hold: 120 ns / 200 ns
- Read/write inter-command times: tSWW = 120 µs; tSWR = 120 µs; tSRW/tSRR = 20 µs; tSRAD = 100 µs
- NCS timing: tBEXIT = 500 ns; tNCS-SCLK = 120 ns; tSCLK-NCS (read) = 120 ns; tSCLK-NCS (write) = 20 µs; tNCS-MISO = 500 ns
- Reset/mode times: tMOT-RST = 30 ms; tSTDWN = 500 ms; tWAKEUP = 30 ms; tREST-EN = 1 s; tREST-DIS = 1 s
- Transient current on ramps: IDDT5 = 85 mA max (0 -> 5 V); IDDT3 = 65 mA max (0 -> 2.8 V)
Pin descriptions (5 V vs 3 V mode)
Table
| Pin | 5 V name | 3 V name | Description |
|---|---|---|---|
| 1 | +VCSEL | +VCSEL | Positive terminal of VCSEL |
| 2 | LASER_NEN | LASER_NEN | Laser enable (active low output) |
| 3 | NCS | NCS | Chip select (active low input) |
| 4 | MISO | MISO | Serial data output |
| 5 | SCLK | SCLK | Serial clock input |
| 6 | MOSI | MOSI | Serial data input |
| 7 | MOTION | MOTION | Motion detect (active low output) |
| 8 | XYLASER | XYLASER | Laser current output control |
| 9 | VDD5 | VDD3 | 5 V input (5 V mode) / 3 V input (3 V mode) |
| 10 | PWR_OPT (GND) | PWR_OPT (VDD3) | Mode select: connect to GND (5 V) or VDD3 (3 V) |
| 11 | GND | GND | Analog ground |
| 12 | REFB | VDD3 | 3 V regulator output (5 V mode) / 3 V input (3 V mode) |
| 13 | REFA | REFA | 1.8 V regulator output |
| 14 | DGND | DGND | Digital ground |
| 15 | VDDIO | VDDIO | IO voltage input (1.65 – 3.3 V) |
| 16 | -VCSEL | -VCSEL | Negative terminal of VCSEL |
Package/mechanical highlights
- 2D assembly drawing provides these reference dimensions:
- Bottom of lens flange to surface: 7.40 mm
- Top of PCB to surface: 2.40 mm
- Top of sensor to surface: 10.75 mm
- Recommended PCB mechanical cutouts and spacing shown (figure includes optical center, pin #1 marking, aperture window and keepouts). Noted callouts include:
- Rectangular openings/spacing such as 12.96, 10.90, 12.60, 6.30, 5.02, 0.50 (units indicated as mm in the figure)
- 16 × Ø 0.80 (pad/hole callouts)
- 14 × 1.78 (slot/spacing callouts)
- Lens alignment and optical center references
Special VCSEL control notes (register LASER_CTRL0 at 0x20)
- Default laser state is Forced_Disable (laser OFF)
- Enable by clearing Forced_Disable; optional continuous ON by CW[2:0] = 010b
- LASER_NEN drives external P‑channel MOSFET to connect/disconnect REFB to laser; faults force LASER_NEN high and cut off laser current
- Cross-check: schematic symbol and footprint vs datasheet
Symbol pinout vs datasheet names/numbers
- Pin numbering: Matches datasheet 1..16.
- Names: All functional names align with the datasheet’s 5 V/3 V naming. Notable stylistic differences:
- VDD5/VDD3, REFB/VDD3, and PWR_OPT_(GND)/(VDD3) use combined labels; datasheet splits by mode. Functionally correct, but consider adopting the exact per-mode names to avoid ambiguity in documentation and firmware notes.
- _LASER_NEN has a leading underscore that is not present in the datasheet (“LASER_NEN”). Recommend renaming to “LASER_NEN” for 1:1 consistency.
- Grounds: GND and DGND are present and match datasheet intent (analog vs digital).
- Remaining pins align: VCSEL, -VCSEL, NCS, MISO, MOSI, SCLK, MOTION, XYLASER, REFA, VDDIO.
Electrical pin types in symbol
- All symbol pins are currently “Unspecified.” Based on the datasheet:
- Power In: VDD5/VDD3 (mode dependent), REFB/VDD3 (mode dependent), VDDIO
- Grounds: GND, DGND
- Digital inputs: NCS, SCLK, MOSI
- Digital outputs: MISO, MOTION, LASER_NEN
- Analog/special output: XYLASER (laser current control), REFA (1.8 V regulator output), REFB (3 V regulator output in 5 V mode)
- VCSEL terminals: +VCSEL, -VCSEL (connect per laser driver topology)
- Risk: Leaving these unspecified undermines ERC checks and can hide connection mistakes. Recommend setting types to match the datasheet functions above.
Footprint/package alignment
- Present footprint: “defaultFootprint” with 16 pads named to match the symbol. However:
- Datasheet shows a specialized mechanical design with a large optical aperture, strict Z-height, lens/base alignment features, and recommended PCB cutouts/keepouts. The current footprint appears to have only pads listed (no evidence of the required optical window, keepout, or alignment holes/slots).
- Datasheet shows pad/hole callouts such as “16 × Ø 0.80” and “14 × 1.78,” and dimensional callouts for rectangular openings (e.g., 12.96, 10.90, 12.60, etc.). These mechanicals are critical to ensure the sensor sees the surface and the lens seats correctly. Their absence will cause board bring-up failure.
- Action risk: Without the optical aperture and proper mechanical stack-up, you cannot achieve correct imaging; the board will not function as a mouse sensor. Additionally, wrong pad sizes/types (SMD vs plated through) could prevent solderability or violate IPC land pattern guidance.
Potential mismatches and risks to call out
- Naming hygiene:
- Leading underscore on _LASER_NEN: rename to “LASER_NEN.”
- Combined per-mode names (VDD5/VDD3, REFB/VDD3, PWR_OPT_(GND)/(VDD3)) are functionally fine, but exact datasheet naming per mode is clearer for documentation and test.
- Pin electrical types: All are “Unspecified” — update to enable ERC and reduce wiring mistakes.
- Footprint mechanicals: Missing optical window/cutouts/keepouts, lens alignment features, and exact pad/hole geometry from the datasheet. This is a blocker for manufacturing and operation.
- Orientation/Pin 1: Ensure clear Pin 1 marking in footprint and silkscreen; datasheet indicates a Pin #1 reference in the mechanical drawing.
If you want, I can:
- Rename pins to match the datasheet exactly and assign proper electrical types.
- Replace the placeholder footprint with a datasheet-accurate land pattern including the optical aperture and recommended cutouts/keepouts.
- Add a brief application note in the part properties documenting the 3 V vs 5 V mode pin behavior (VDD5 vs VDD3; REFB vs VDD3; PWR_OPT strapping).
Fix pin naming/types
Verify footprint geometry
Locate official datasheet
List per-mode power pins
66 days
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