Ultrasonic Receiver Front-End Design

zyp520

zyp520

The schematic is much better, but please make these required fixes.
  1. Replace the current D1 input protection with two separate Schottky clamp diodes: D_CLAMP_H:
    • Anode = RX_PROT
    • Cathode = +5V
    D_CLAMP_L:
    • Anode = AGND
    • Cathode = RX_PROT
  2. Properly terminate unused op-amp U2B:
    • U2B IN+ = VREF
    • U2B IN- = U2B OUT
    • U2B OUT net name = U2B_UNUSED_OUT
  3. Add an optional VREF isolation resistor:
    • U2A OUT -> R_VREF_ISO = 22 ohm -> VREF
    • U2A IN- should connect to VREF
    • C_VREF1 and C_VREF2 should connect from VREF to AGND
  4. Rename the important nets clearly:
    • J_PWR pin 1 = +5V
    • J_PWR pin 2 = AGND
    • J_RX pin 1 = RX_RAW
    • J_RX pin 2 = AGND
    • R_VREF_TOP P2 / R_VREF_BOT P1 = VREF_RAW
    • U2A output after R_VREF_ISO = VREF
    • R_IN P2 = RX_PROT
    • C_IN P2 / R_BIAS P1 / U1A IN+ = RX_BIAS
    • U1A IN- = AMP1_FB
    • U1A OUT = AMP1_OUT
    • C_HP P2 / R_HP P1 / R_LP P1 = HP_OUT
    • R_LP P2 / C_LP P1 / U1B IN+ = BP_OUT
    • U1B IN- = AMP2_FB
    • U1B OUT = RX_OUT
    • R_OUT P2 / J_OUT pin 1 = ADC_OUT
  5. Make the schematic readable from left to right: J_RX -> input clamp -> AC coupling -> U1A -> filter -> U1B -> J_OUT.

flux

I’ll replace the clamp with two separate Schottky diodes, add the 22 Ω VREF isolation resistor, correct U2B termination, and then recheck the named nets and ERC.

flux

Done. I replaced the BAT54S array with two separate Schottky clamps: D_CLAMP_H now clamps RX_PROT to +5V, and D_CLAMP_L clamps RX_PROT to AGND. I also added R_VREF_ISO = 22 Ω between U2A OUT and VREF, kept U2A IN- on VREF, and confirmed U2B is terminated correctly with IN+ = VREF and IN- = OUT on U2B_UNUSED_OUT.
The important nets are now explicit and correct, including +5V, AGND, VREF_RAW, VREF_BUF, VREF, RX_RAW, RX_PROT, RX_BIAS, AMP1_FB, AMP1_OUT, HP_OUT, BP_OUT, AMP2_FB, RX_OUT, and ADC_OUT, and ERC is clean. One limitation remains: I can fix the logical connectivity and net names, but I don’t have direct control over the visual freehand placement of schematic symbols to fully redraw the page left-to-right like a human editor; functionally, the circuit is now corrected and labeled.
Check remaining warnings
Rearrange schematic help
Review VREF network
Create BOM spreadsheet
C_IN P2 - R_BIAS P1
U1 OUT2 - TP_OUT P1
J_PWR Pin_2 - J_RX Pin_2
J_PWR Pin_2 - J_RX Pin_2
U1 OUT1 - TP_AMP1 P1
J_RX Pin_1 - TP_RX_RAW P1
U2 IN1- - C_VREF1 P1
R_OUT P2 - J_OUT Pin_1
J_PWR Pin_2 - J_RX Pin_2
U1 IN1- - R_G1 P1
U1 IN2- - R_G2 P1
J_PWR Pin_2 - J_RX Pin_2
U2 IN1- - C_VREF1 P1
R_IN P2 - TP_PROT P1
U2 OUT1 - R_VREF_ISO P1
U2 IN1- - C_VREF1 P1
J_PWR Pin_1 - U1 V+
R_VREF_TOP P2 - R_VREF_BOT P1
J_PWR Pin_1 - U1 V+
J_PWR Pin_2 - J_RX Pin_2
J_PWR Pin_1 - U1 V+
R_LP P2 - C_LP P1
J_RX Pin_1 - TP_RX_RAW P1
R_LP P2 - C_LP P1
TP_VREF
U1
J_PWR
J_RX
J_OUT
TP_PROT
TP_RX_RAW
TP_BP
U2
  • Generic Inductor
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40kHz_Ultrasonic_RX_Frontend_1CH

40kHz_Ultrasonic_RX_Frontend_1CH thumbnail
Single-channel analog front-end for a 40 kHz air-coupled ultrasonic receiver using a 5 V single supply, buffered 2.5 V mid-reference, protection, gain, band-pass shaping, and ADC-ready output centered at VREF.

Properties

Properties describe core aspects of the project.

Pricing & Availability

Distributor

Qty 1

Arrow

$1.16–$1.34

Digi-Key

$1.30

HQonline

$0.62

LCSC

$0.97

Mouser

$2.86

TME

$0.44

Verical

$2.50–$2.65

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