P-Channel MOSFET Circuit Design

flux

I removed the blade fuse holder from the schematic and reconnected J1 PIN1 directly to the protected input net feeding the TVS and MOSFET source.
On the resettable fuse question: not recommended for your stated current profile. For a 24 V load with 6 A RMS and 15 A spikes, a PPTC/resettable fuse would need roughly ≥7–10 A hold current with enough trip margin to avoid nuisance trips. The available library searches did not find a suitable 24 V high-current PPTC, and high-current PPTCs add resistance, voltage drop, heat, and strong temperature derating.
Current state:
  • Fuse holder removed.
  • Single P-channel MOSFET protection remains.
  • TVS/ESD protection remains.
  • Input now goes directly to the protected input node.
Remaining work when execution can continue:
  • Update the project files to remove fuse-holder references.
  • Re-run schematic review.
  • If you still want resettable protection, select a specific high-current PPTC outside the current library or switch to an electronic fuse/load-switch approach.
T

treadlite

you didn't finish wiring all the connections

flux

You’re right — I’ll inspect the current nets, identify every floating or single-pin connection, then finish the schematic wiring and re-run review until the remaining issues are either fixed or clearly layout-only.

flux

You were right — the schematic connectivity needed cleanup. I reconnected the full single-P-channel MOSFET protection circuit:
  • J1 PIN1 → VIN input rail → Q1 source, TVS cathode, input bulk cap, gate zener cathode, gate pull-up
  • Q1 drain → protected 24 V output → J2 PIN1 and output bulk cap
  • Q1 gate → zener anode, pulldown, pull-up
  • J1/J2 returns, TVS anode, bulk caps, and pulldown → GND
  • Renamed the stale fused input net to remove fuse-holder implication
  • Updated the design notes and bring-up plan to remove fuse-holder references
Current review result: schematic connectivity is complete; the remaining reported issues are PCB airwires, which are expected because the board has not been placed/routed yet.
Updated files:
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Files

Schematic

Layout

3D View

C1
Capacitance
47uF
R2
Q1 D - J2 PIN1
J2
J1 PIN1 - Q1 S
Q1 G - D2 A
Q1 G - D2 A
Q1 G - D2 A
D1
R1
Resistance
47kΩ
Q1 D - J2 PIN1
J1 PIN1 - Q1 S
Q1 D - J2 PIN1
J1 PIN1 - Q1 S
J1 PIN1 - Q1 S
J1 PIN1 - Q1 S
J1
Q1 G - D2 A
D2
J1 PIN1 - Q1 S
C2
Capacitance
47uF
GND
GND
GND
GND
GND
Q1
GND
Power Protection Design Notes — 24V Protected Load Switch
Requirements
  • Nominal input: 24 V DC
  • Protection: ESD/transient suppression and reverse-polarity protection
  • Reverse-polarity element: single P-channel MOSFET as requested
  • Load current: up to 6 A RMS, transient spikes up to 15 A
  • No fuse holder in the schematic. A resettable fuse/PPTC was considered, but is not recommended for the stated 6 A RMS / 15 A spike profile unless a specific high-current, low-resistance, temperature-derated part is selected.
Implemented Circuit
  • J1: 24 V input terminal block
    • PIN1 = +24 V input / VIN_24V_RAW
    • PIN2 = input return / GND
  • D1: SMBJ24A unidirectional TVS diode from VIN_24V_RAW to GND
    • 24 V working standoff
    • 38.9 V clamp at 16 A peak pulse current
  • Q1: SUD19P06-60 P-channel MOSFET reverse-polarity protector
    • Source = VIN_24V_RAW
    • Drain = PROTECTED_24V
    • Gate = MOSFET_GATE
  • D2: BZT52C12 12 V zener from gate to source
    • Cathode = VIN_24V_RAW / Q1 source
    • Anode = MOSFET_GATE / Q1 gate
    • Protects Q1 from exceeding the ±20 V VGS rating
  • R1: 47 kΩ from MOSFET_GATE to GND
    • Turns Q1 on during correct polarity input
  • R2: 100 kΩ from VIN_24V_RAW to MOSFET_GATE
    • Keeps Q1 off when input is floating
  • C1: 47 µF 50 V bulk capacitor on VIN_24V_RAW
  • C2: 47 µF 50 V bulk capacitor on PROTECTED_24V
  • J2: protected load output terminal block
    • PIN1 = PROTECTED_24V
    • PIN2 = GND
Power and Thermal Notes
Using a single SUD19P06-60 is electrically valid but thermally significant:
  • Datasheet RDS(on): 60 mΩ max at VGS = -10 V, ID = -10 A
  • RMS conduction loss at 6 A: P = I²R = 6² × 0.060 = 2.16 W
  • Transient loss at 15 A: P = 15² × 0.060 = 13.5 W during the spike
This requires a large copper area on the MOSFET drain/tab and careful layout. For sustained 6 A operation, verify case temperature during bring-up. If temperature is excessive, use a lower-RDS(on) P-channel MOSFET or move to an ideal-diode controller with an N-channel MOSFET.
Resettable Fuse / PPTC Guidance
A resettable fuse can be added ahead of VIN_24V_RAW only if the selected part is rated for the full operating environment:
  • Hold current must exceed the real continuous RMS current after temperature derating.
  • Trip current must tolerate acceptable 15 A load spikes without nuisance tripping.
  • Voltage rating must be at least 24 V DC, preferably with margin.
  • Series resistance and self-heating must be acceptable at 6 A RMS.
For this design, a PPTC is not currently included because high-current PPTCs tend to add substantial voltage drop and heat, and may nuisance trip near a 6 A RMS load depending on ambient temperature and pulse profile.
Review Status
Schematic connectivity has been verified. Current remaining review items are PCB airwires, which are expected before PCB placement/routing. Routing should wait until the schematic is approved and layout is started.

  • Requirements

  • Implemented Circuit

  • Power and Thermal Notes

  • Resettable Fuse / PPTC Guidance

  • Review Status