Part Audit Review
can you group together pins by their functions?
for example for Power, 3v3, gnd_1 gnd_2 etc
NOTE: If you group them, can you not add the same pin if you already added them in a group? You should know which pin function is common for its function.
Thought for 19 sec
Yes. I’ll assign every pin to exactly one broad functional group based on the datasheet, with Power first, Ground last, and no duplicate pin membership; Section will match Pin Group.
Worked for 4 mins 22 sec
Created a project doc
ZED-F9P-05B Part Audit
Reviewed project metadata, manufacturer identification, package and pad count, description/properties, all 102 schematic terminals, and the ...
Completed the full part audit and grouped all 102 pins exactly once into nine functional groups. Power is top/order 1, Ground is bottom/order 10, and every pin’s Section matches its Pin Group with no duplicate membership.
Key mismatches include the incorrect “54-pin” description, missing package/Part Type metadata, unspecified pin types/descriptions, and paste-mask geometry that differs from u-blox recommendations. Full findings are in ZED-F9P-05B Part Audit.
Fix metadata and pins
Correct metadata
Populate pin metadata
Fix paste apertures
Run validation
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ZED-F9P-05B Part Audit
Scope
Reviewed project metadata, manufacturer identification, package and pad count, description/properties, all 102 schematic terminals, and the complete 102-pad PCB footprint against official u-blox documentation. Functional pin grouping was then applied and verified.
Official sources
- ZED-F9P-05B Data sheet, UBXDOC-963802114-12824 R02
- ZED-F9P Integration manual, UBX-18010802 R16
- Official product page
Datasheet property
The canonical Datasheet URL property was already populated with the official u-blox product page. Per the request, no mutation was needed.
Key specifications
- Exact device: ZED-F9P-05B-00, HPG 1.51
- Package: 102-pad LGA module, nominal 22.0 x 17.0 x 2.4 mm, approximately 1.8 g
- Main supply: 2.7-3.6 V, 3.0 V typical
- Backup supply: 1.65-3.6 V
- USB supply: 3.0-3.6 V
- Temperature: -40 C to +85 C
- Tracking sensitivity: -167 dBm
- RF input: 50 ohm; recommended external RF gain 17-50 dB
- VCC_RF: approximately VCC - 0.1 V, 50 mA operating maximum
- Interfaces: two UARTs, USB 2.0 full-speed, SPI peripheral, I2C Fast-mode
- RTK horizontal accuracy: 0.01 m + 1 ppm CEP
- Constellations documented for this variant: GPS/QZSS, GLONASS, Galileo, BeiDou, with SBAS augmentation
- Typical tracking current: approximately 93 mA for GPS+GLO+GAL+BDS; peak acquisition current 130 mA
- Active external antenna required
Metadata findings
Correct
- Manufacturer: u-blox
- MPN/name: ZED-F9P-05B
- Dimensions stated as 22 x 17 mm
- 102 terminals and 102 PCB pads
Mismatches or omissions
- Part Type is missing.
- No canonical Package/Case property identifies the 102-pad LGA module.
- Description says "54-pin LGA"; the part has 54 perimeter pads plus 48 central ground pads, totaling 102.
- Description claims NavIC support, which is not listed for the exact 05B variant in the reviewed official documentation.
- Generic L1/L2/L5 wording is misleading; documented signals are GPS/QZSS L1C/A+L2C, GLONASS L1OF+L2OF, Galileo E1B/C+E5b, and BeiDou B1I+B2I.
- The 25 Hz statement is mode/constellation dependent; four-constellation RTK is 5 Hz.
- The stated approximately 0.5 W typical consumption is not supported by 93 mA at 3.0 V (approximately 0.28 W, excluding an externally powered antenna).
Schematic terminal audit
- Pin numbers 1-54 match the external-edge assignment.
- Pins 55-102 correctly represent the 48 central ground pads.
- No missing or duplicate physical pin numbers were found.
- Principal RF, antenna supervision, UART2, USB, multiplexed UART/SPI/I2C, D_SEL, reset, safeboot, EXTINT, status, and TIMEPULSE assignments match.
Naming deviations
- Pin 5 is
ANT_OFF_rather thanANT_OFF. - VCC pins are named
VCC_1andVCC_2rather than repeatedVCC. - Ground and Reserved names use numeric suffixes for uniqueness.
- Multiplexed names use
_/_rather than the datasheet's slash formatting.
Remaining terminal metadata gaps
All terminals still have Pin Type set to Unspecified and lack datasheet-derived Pin Description. These should be populated in a separate correction pass if full ERC-quality metadata is required.
Functional grouping applied
Every physical pin is assigned to exactly one group; Section equals Pin Group for all 102 terminals.
Table
| Group | Count | Orientation | Terminal Order |
|---|---|---|---|
| Power | 5 | Top | 1 |
| RF/Antenna | 4 | Left | 2 |
| USB | 2 | Right | 3 |
| UART2 | 2 | Left | 4 |
| Host Interface | 6 | Right | 5 |
| Timing/Status | 4 | Left | 6 |
| Control | 2 | Right | 7 |
| Reserved | 21 | Left | 9 |
| Ground | 56 | Bottom | 10 |
Verification confirmed 102 unique physical pin numbers (1-102), non-empty groups/sections for every terminal, no duplicate group membership, and preserved pin names, numbering, footprint mapping, and geometry.
Footprint audit
Matching the official recommended land pattern
- 102 SMD pads: 54 perimeter pads and 48 central ground pads
- 22.0 x 17.0 mm nominal body outline
- 1.10 mm perimeter pitch
- Perimeter copper pads approximately 0.80 x 1.50 mm
- Perimeter center offsets approximately +/-9.95 mm and +/-7.45 mm
- Central pads approximately 1.10 x 1.10 mm on a 2.10 mm grid
- Pin-1 marker present
Footprint mismatches and concerns
- Copper, paste, and mask geometry are identical on all pads, while the official suggested paste apertures differ from copper dimensions.
- Perimeter paste should be approximately 0.75 x 1.55 mm rather than the current copper-matching 0.80 x 1.50 mm.
- Central paste apertures also differ from the 1.10 x 1.10 mm copper lands; no segmented/windowed treatment is evident.
- Courtyard is conservative but does not directly correspond to the integration manual's footprint envelope.
- Silkscreen clearance and pin-1 marker visibility should be checked against the selected fabricator's rules.
- Process-specific solder-mask expansion, stencil thickness, paste volume, and restricted routing below the pin-1 indicator remain unverified.
Recommended corrections
- Correct the description: 102-pad LGA, supported constellations/bands, update-rate qualification, and typical power figure.
- Add Part Type and Package/Case metadata.
- Populate Pin Type and Pin Description for all terminals from the datasheet.
- Rename accidental
ANT_OFF_toANT_OFFif naming compatibility permits. - Update paste-mask apertures to the official recommended stencil geometry and run a manufacturability review.
Scope
Official sources
Datasheet property
Key specifications
Metadata findings
Correct
Mismatches or omissions
Schematic terminal audit
Naming deviations
Remaining terminal metadata gaps
Functional grouping applied
Footprint audit
Matching the official recommended land pattern
Footprint mismatches and concerns
Recommended corrections
