Completed the TC2030-NL footprint correction. Pads 1–6 are explicitly set to the official Ø0.787 mm contact geometry with paste apertures closed, and alignment holes 7–9 are explicitly set as Ø0.991 mm NPTH holes.
I also updated TC2030-CTX-NL Part Review to correct the earlier pad-diameter interpretation and record the applied overrides. I filed an internal part-quality report for the source footprint’s paste-layer issue and misleading MCP-named asset.
Reviewed available part information for the current part project TC2030-CTX-NL: MPN, package/mount, pin count, description, configured properties, schematic symbol terminals, PCB footprint, pad geometry, and pin descriptions. The review compares the Flux part against official Tag-Connect documentation.
Mechanically related TC2030-NL footprint, but named for Microchip ICD cable rather than Cortex CTX cable. This is a metadata/ambiguity issue.
Official TC2030-CTX Pinout
From the official TC2030-CTX datasheet:
Table
TC2030 footprint pin
Signal
1
VCC
2
SWDIO / TMS
3
nRESET
4
SWCLK / TCK
5
GND, also connected to GNDDetect
6
SWO / TDO
The 10-pin Cortex debugger-side connector mapping is:
Table
10-pin Cortex pin
Signal
1
VCC
2
SWDIO / TMS
3
GND
4
SWCLK / TCK
5
GND
6
SWO / TDO
7
NC / RTCK
8
NC / TDI
9
GNDDetect
10
nRESET
Schematic Symbol Review
Current schematic symbol contains six terminal components numbered 1 through 6.
Findings
Pin numbers 1–6 are present, matching the datasheet terminal count.
All terminal Pin Type values are currently Unspecified.
No Pin Description properties are present on the terminal components.
The symbol positions split odd-numbered pins on the left and even-numbered pins on the right. This is readable, but it does not expose the signal function unless pin descriptions are added.
Recommended symbol terminal properties
Table
Pin
Recommended Pin Description
Suggested Pin Type
1
VCC
Power
2
SWDIO / TMS
Bidirectional
3
nRESET
Input
4
SWCLK / TCK
Input
5
GND; also connected to GNDDetect
Ground
6
SWO / TDO
Output
Footprint Review
Current footprint asset contains:
Six circular SMD contact pads:
Pad 1: (-1.270, 0.434) mm, size 0.787 x 0.787 mm
Pad 2: (-1.270, -0.836) mm, size 0.787 x 0.787 mm
Pad 3: (0.000, 0.434) mm, size 0.787 x 0.787 mm
Pad 4: (0.000, -0.836) mm, size 0.787 x 0.787 mm
Pad 5: (1.270, 0.434) mm, size 0.787 x 0.787 mm
Pad 6: (1.270, -0.836) mm, size 0.787 x 0.787 mm
Three NPTH alignment holes:
Pad 7: (-2.540, -0.201) mm, drill/size 0.991 mm
Pad 8: (2.540, -1.217) mm, drill/size 0.991 mm
Pad 9: (2.540, 0.815) mm, drill/size 0.991 mm
SMD pads include F.Paste in their layer set.
Official TC2030-NL footprint sources referenced by Tag-Connect specify:
Contact pads: Ø0.0310 in ±0.0030 / Ø0.787 mm ±0.076 mm conductive contact pads.
No solder paste on contact pads.
Alignment holes: Ø0.0390 in ±0.0030 / Ø0.991 mm ±0.076 mm non-plated through holes.
Contact pitch: 0.0500 in / 1.270 mm.
Keepout requirements: no tracks/vias in shaded keepout area; no other track or signal within 0.020 in of any contact pad.
Follow-up verification note: a second source check against the DigiKey-rendered Tag-Connect drawing and the KiCad reference footprint clarified that the Ø0.0310 in dimension applies to the six contact pads, while Ø0.0390 in applies to the three non-plated alignment holes. The earlier interpretation that contact pads should be Ø0.0400 in / 1.016 mm was incorrect.
Mismatches / Risks Flagged
Solder paste was enabled on contact pads. Current pads were generated from a KiCad asset that includes F.Paste; official notes say no solder paste on the contact pads. This has been corrected in the layout with a solderPasteMaskExpansion = -0.3935 mm override on pads 1–6.
Footprint naming is for Microchip MCP, not Cortex CTX. The asset is named/described TC2030-MCP-NL-10; the physical no-legs TC2030 footprint is shared, but the name can mislead users because the MCP cable pin mapping differs from the CTX Cortex SWD pinout.
Pin descriptions are missing. The schematic terminals are numbered but do not identify VCC, SWDIO/TMS, nRESET, SWCLK/TCK, GND/GNDDetect, or SWO/TDO.
Pin types are unspecified. ERC and downstream consumers cannot infer power/ground/input/output behavior from the current symbol.
Manufacturer facet is generic. The part property says Tag Connect, but the library/search manufacturer facet reports Other; this is a metadata mismatch rather than an electrical issue.
Key Specs Summary
Manufacturer: Tag-Connect
MPN: TC2030-CTX-NL
Function: 6-pin no-legs Plug-of-Nails cable for ARM Cortex SWD debug/programming
Official contact pad diameter: 0.787 mm / 0.031 in
Official alignment hole diameter: 0.991 mm / 0.039 in, NPTH
Contact pad paste: no solder paste
Retention: no-legs version uses alignment pins and can be retained with TC2030-CLIP boards
Recommended Next Edits
Update terminal Pin Description and Pin Type properties according to the TC2030-CTX datasheet.
Rename or replace the footprint asset with a generic TC2030-NL/TC2030-IDC-NL footprint name to avoid Microchip-vs-Cortex ambiguity.
Add or encode TC2030-NL keepout guidance so users do not route traces/vias under the connector contact/keepout area.
Footprint Correction Applied
Applied PCB rulesets:
TC2030-NL contact pads: official diameter and no paste: pads 1–6 set to circular SMD Ø0.787 mm with solder paste aperture closed using solderPasteMaskExpansion = -0.3935 mm.
TC2030-NL alignment holes: official NPTH diameter: alignment holes 7–9 set to circular HOLE Ø0.991 mm with Ø0.991 mm drill.
Read-back after the edit confirmed pads 1–6 remain Ø0.787 mm and alignment holes 7–9 remain Ø0.991 mm in the expected TC2030-NL pattern. The active correction is the no-paste rule on pads 1–6 plus explicit rules documenting the official geometry.
6-Pin "No Legs" Cable with 10-pin micro-connector for Cortex processors
Cable assembly, designed for ARM Cortex® SWD debugging and programming, featuring a 6-pin Tag-Connect™ Plug-of-Nails™ connector that mates with the TC2030 target footprint and a 10-pin FTSH-105 compatible ribbon connector. The cable supports SWD signals including VCC, SWDIO/TMS, SWCLK/TCK, SWO/TDO, nRESET, and GND for direct connection between compatible debuggers and target PCBs. #CableAssembly#DebugCable#ARMCortex#SWD#TagConnect#TC2030#ProgrammingCable