STM32C031 Datasheet Audit

flux

I’ll apply this to the current MPN, STM32C031K6T6. I’ll preserve every pin number and mapping, remove Pin Group, assign datasheet-based sections/types/orientations/orders, and rebalance the symbol with power first and ground last.
Created a project doc

Part Datasheet Audit

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Part Datasheet Audit Result
Part: STM32C031K6T6
Manufacturer: STMicroelectronics
Official datasheet: https://www.st.com/resource/en/datasheet/stm32c031k6.pdf
Datasheet revision reviewed: DS13867 Rev 4, January 2024
Lifecycle: Active / full production
Key specifications
  • Arm Cortex-M0+ core, up to 48 MHz
  • 32 Kbytes Flash
  • 12 Kbytes SRAM with hardware parity
  • Supply: 2.0 V to 3.6 V
  • STM32C031K6T6 temperature code 6: -40 °C to +85 °C ambient, +105 °C maximum junction
  • 12-bit ADC, up to 19 external + 2 internal channels for the K6 device
  • 1 x I2C Fast-mode Plus, 1 x SPI / I2S, 2 x USART
  • Advanced-control timer, four general-purpose 16-bit timers, two watchdogs, SysTick

flux

Updated the official datasheet URL and reorganized all 32 symbol pins without changing names, numbers, or mappings. Pins are balanced 16/16 left/right, Power is first, Ground last, and all Pin Group properties were removed.
The Part Datasheet Audit contains the full findings. Critical issue: the LQFP32 footprint appears scaled approximately 1000× too small; incorrect Logic/AND classification and missing package metadata were also flagged. An internal part-quality report was filed.
Fix footprint and metadata
Review corrected footprint
Normalize pin labels
PA12PA10
Pin Number
23
PB5
Pin Number
29
PB0
Pin Number
15
PA11PA9
Pin Number
22
PB7
Pin Number
31
PB3
Pin Number
27
PA14-BOOT0
Pin Number
25
PA3
Pin Number
10
PA1
Pin Number
8
PC6
Pin Number
20
PA15
Pin Number
26
PA0
Pin Number
7
PB1
Pin Number
16
PA4
Pin Number
11
PB2
Pin Number
17
PB6
Pin Number
30
PA9
Pin Number
19
PC14-OSCX_INPC14
Pin Number
2
VSS/VSSA
Pin Number
5
PA2
Pin Number
9
PC15-OSCX_OUTPC15
Pin Number
3
PB9
Pin Number
1
PB4
Pin Number
28
PA13
Pin Number
24
PA5
Pin Number
12
VDD/VDDA
Pin Number
4
PA7
Pin Number
14
PB8
Pin Number
32
PF2-NRST
Pin Number
6
PA10
Pin Number
21
PA6
Pin Number
13
PA8
Pin Number
18

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Part Datasheet Audit
Result
Part: STM32C031K6T6
Manufacturer: STMicroelectronics
Official datasheet: https://www.st.com/resource/en/datasheet/stm32c031k6.pdf
Datasheet revision reviewed: DS13867 Rev 4, January 2024
Lifecycle: Active / full production
Key specifications
  • Arm Cortex-M0+ core, up to 48 MHz
  • 32 Kbytes Flash
  • 12 Kbytes SRAM with hardware parity
  • Supply: 2.0 V to 3.6 V
  • STM32C031K6T6 temperature code 6: -40 °C to +85 °C ambient, +105 °C maximum junction
  • 12-bit ADC, up to 19 external + 2 internal channels for the K6 device
  • 1 x I2C Fast-mode Plus, 1 x SPI / I2S, 2 x USART
  • Advanced-control timer, four general-purpose 16-bit timers, two watchdogs, SysTick
  • SWD debug
  • Package: 32-pin LQFP, 7 x 7 mm body, 0.80 mm pitch, 9 x 9 mm lead span
Metadata audit

Table

FieldCurrent stateDatasheet cross-checkStatus
MPNSTM32C031K6T6Exact matchPass
ManufacturerSTMicroelectronicsExact matchPass
Pin count32K = 32 pinsPass
Datasheet URLOfficial ST PDF setCorrectPass
DescriptionSTM32C031K6T6 onlyShould describe the Cortex-M0+ MCU and principal memory/peripheralsIncomplete
Part TypeIntegrated CircuitsBroadly validPass
IC subtypeLogicDevice is a microcontroller, not a logic gateMismatch
Logic FunctionANDNot applicable to this MCUMismatch
Package propertyNot explicitly setShould state LQFP32, 7 x 7 mm, 0.80 mm pitchMissing
Symbol styleParametric v1Appropriate for terminal organizationPass
Symbol and pin audit
All 32 physical pin numbers remain present exactly once and match the LQFP32 column of datasheet Table 12. No pins were renamed, renumbered, replaced, or remapped.
The symbol terminals were reorganized into Power, Clock, Reset, GPIO Port A, GPIO Port B, GPIO Port C, and Ground sections. Terminal orders are unique from 1 through 32, with Power first and Ground last. Multi-pin sections are evenly split between left and right; the complete symbol is balanced 16 left / 16 right. Pin Group was removed from every terminal as requested.
Pin types and descriptions are now populated from the datasheet. Power is Power In, ground is Ground, and multiplexed GPIO pins are Bi-Directional. No unresolved pin functions remain.
Naming observations
The following existing terminal names are non-canonical concatenations but their physical numbers and functions match the datasheet:
  • PC14-OSCX_INPC14 -> datasheet name PC14-OSCX_IN (PC14), pin 2
  • PC15-OSCX_OUTPC15 -> datasheet name PC15-OSCX_OUT (PC15), pin 3
  • PA11PA9 -> datasheet name PA11 [PA9], pin 22
  • PA12PA10 -> datasheet name PA12 [PA10], pin 23
They were intentionally not renamed because the requested constraint prohibited changing pin names or mappings. Their Pin Description fields now explain the oscillator/remap functions.
Footprint audit
The footprint topology is consistent with an LQFP32: 32 perimeter pads, eight per side, and the pad sequence corresponds to the symbol pin numbers. The footprint asset and 3D model are labeled LQFP32_7X7_STM.
However, the persisted computed geometry is approximately 1000 times too small:
  • Current pad pitch appears about 0.0008 mm; datasheet pitch is 0.80 mm.
  • Current pad size appears about 0.000508 x 0.0014732 mm; the intended imported values appear to be 0.508 x 1.4732 mm.
  • Current body/pad extents are expressed around 0.004-0.005 mm from center instead of approximately 4-5 mm.
The datasheet footprint example specifies 0.80 mm pitch, 0.50 mm pad width, 1.20 mm pad length, 6.10 mm inner span, 9.70 mm outer span, and a 7.30 mm courtyard/body-related dimension. The current footprint must not be used for PCB fabrication until its scale is corrected and reverified.
Final mismatch list
Critical
  1. Footprint geometry is scaled approximately 1000x too small. This is fabrication-blocking.
Metadata
  1. IC subtype is incorrectly classified as Logic.
  2. Logic Function is incorrectly set to AND.
  3. Description is too generic and omits the MCU function/specification summary.
  4. Explicit package/case metadata is missing.
Non-critical naming
  1. Four terminal names use concatenated formatting rather than the datasheet notation; pin numbers and mappings are correct, and descriptions now disambiguate them.
  1. Rebuild or rescale the LQFP32 footprint to the official ST dimensions and verify pin-1 orientation, 0.80 mm pitch, pad dimensions, body outline, courtyard, and 3D model alignment.
  2. Change the IC subtype/classification from Logic to Microcontroller and remove the AND logic function metadata.
  3. Add package metadata: LQFP32, 7 x 7 mm body, 0.80 mm pitch.
  4. Expand the description to identify the 48 MHz Cortex-M0+ MCU, 32 KB Flash, 12 KB SRAM, ADC, timers, and communication interfaces.
  5. Optionally normalize the four concatenated terminal names in a separate change only if pin-name changes are approved.

  • Result

  • Key specifications

  • Metadata audit

  • Symbol and pin audit

  • Naming observations

  • Footprint audit

  • Final mismatch list

  • Critical

  • Metadata

  • Non-critical naming

  • Recommended corrections

Documents

Assets

STM32C031K6T6

STM32C031K6T6

LQFP32_7X7_STM.step3D Model

F_STM32C031K6T6.kicad_mod

F_STM32C031K6T6

STM32C031K6T6

STM32C031K6T6.kicad_modFootprint
image.png

image.png

imageThumbnail

STM32C031K6T6

STM32C031K6T6 Symbol.svgDefault

STM32C031K6T6

STM32C031K6T6 thumbnail
STM32C031K6T6

Properties

STM32C031K6T6

STMicroelectronics

Integrated Circuits

st.com/resource/en/datasheet/stm32c031k6.pdf

U

parametric-v1

Pricing & Availability

DPN

Stock

Qty 1

1

0

$1.0008

1

121

$1.2545

1

0

$1.34

Controls