Part Audit Review
Yes, correct the pin mapping, pin types, descriptions, metadata, and exposed-pad paste strategy.
Thought for 7 sec
I’ll correct the symbol’s pin assignments and metadata from the datasheet, then revise the exposed-pad paste into a segmented manufacturable pattern and verify the resulting symbol and footprint.
Worked for 5 mins 35 sec
The symbol and metadata corrections are in place. The footprint API cannot safely create independent paste-only windows, so I preserved the exposed-pad copper and applied a centered paste reduction giving about 60.5% coverage; I’m now performing the final read-back verification.
Worked for 1 min 27 sec
Corrected the pin 41–43 mapping, pin 50 label, all 77 pin types/descriptions, and part metadata. Pad 77 retains its 6.06 × 6.56 mm copper land with a reduced 4.66 × 5.16 mm paste aperture (~60.5% coverage); true window-pane segmentation is not safely supported by the current footprint API.
Verification confirmed 77 unique pins and 77 footprint pads. Details are recorded in the updated Part Audit Report.
Review stencil and land
Add USB impedance metadata
Inspect 3D package fit
Prepare bring-up guidance
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Part Audit Report
Scope
Audit of RTL8812AU-CG project metadata, 77-terminal schematic symbol, QFN footprint, and stored datasheet against Realtek RTL8812AU-CG Datasheet Rev. 0.2 (24 May 2011, Track ID JATR-2265-11).
Existing Part Information
Table
| Field | Current value | Assessment |
|---|---|---|
| Name / MPN | RTL8812AU-CG | Matches datasheet ordering information |
| Manufacturer | Realtek | Matches datasheet |
| Description | SINGLE-CHIP IEEE 802.11ac 2T2R WLAN CONTROLLER | Correct but incomplete; datasheet adds “WITH USB 2.0/3.0 INTERFACE” |
| Part Type | Empty | Missing metadata |
| Designator Prefix | IC | Appropriate |
| Datasheet URL | https://datasheetspdf.com/pdf-file/964063/RealtekMicroelectronics/RTL8812AU-CG/1 | Present, so no update was required. This is a third-party-hosted copy, not a realtek.com PDF. |
| Package | Footprint named QFN40P900X900X100-77N-D; QFN-76 with exposed pad | Substantially matches QFN-76, 9 × 9 mm, 0.4 mm pitch, pin 77 exposed pad |
| Terminal count | 77 | Correct: 76 perimeter leads plus exposed GND pad |
Official manufacturer product page: https://www.realtek.com/Product/Index?cate_id=194&id=579
The available Realtek PDF is marked “CONFIDENTIAL: Development Partners Only”; public copies are hosted by third parties. The stored document text identifies Realtek Semiconductor Corp. and the correct MPN/revision.
Key Datasheet Specifications
- Highly integrated dual-band IEEE 802.11a/b/g/n/ac Draft 2.0 WLAN controller.
- 2T2R / 2×2 MIMO, two spatial streams.
- USB 2.0/3.0 host interface; USB 3.0 SuperSpeed TX and RX differential pairs plus USB 2.0 high-speed D+/D− pair.
- 2.4 GHz and 5 GHz operation; 20/40/80 MHz channels, with 5/10 MHz modes also listed.
- Maximum PHY rates: 173.3 Mb/s at 20 MHz, 400 Mb/s at 40 MHz, 866.7 Mb/s at 80 MHz.
- Supports 256-QAM, STBC, LDPC, transmit beamforming, MRC receive diversity, WMM/802.11e, WPA/WPA2/802.11i, WAPI, Wi-Fi Direct, Wake-on-WLAN, and checksum offload.
- Single external 3.3 V source; internal/generated 1.2 V domains.
- DVDD33 operating range: 3.0–3.6 V, 3.3 V typical.
- DVDD12 operating range: 1.10–1.32 V, 1.2 V typical.
- Ambient operating temperature: 0–70 °C. Storage: −55–125 °C. Junction: 0–125 °C.
- Package: QFN-76 Green, 9.00 × 9.00 mm, 0.40 mm pitch, 0.75–1.00 mm overall height.
- Exposed pad dimensions: D2 5.56–6.06 mm, E2 6.06–6.56 mm.
Schematic Symbol Cross-Check
Confirmed matches
- Pins 1–40 match the datasheet pin numbers and principal signal names.
- Pins 44–49 and 51–77 generally match the datasheet numbering and names.
- Pin 77 is represented as GND exposed pad.
- RF channel-0 and channel-1 signal groups, power rails, GPIO/LED/BT-coexistence pins, oscillator pins, switching regulator pins, and USB 3.0 pins are present.
Definite symbol mismatches
Table
| Pin | Datasheet | Current symbol | Severity |
|---|---|---|---|
| 41 | HSDP — USB 2.0 high-speed differential pair | GND_1 | Critical |
| 42 | HSDM — USB 2.0 high-speed differential pair | HSDP | Critical |
| 43 | GND | HSDM | Critical |
This is a three-pin offset in the USB 2.0/GND section. Using the part as currently defined would connect USB D+, USB D−, and ground to the wrong physical leads.
Naming and metadata issues
- Pin 50 is named
GN_D; datasheet name isGND. The pin number is correct, but the label contains a typo. - Pins 55 and 56 are named
LX_SPS0_1andLX_SPS0_2; datasheet names both pinsLX. The current names are understandable aliases but should have descriptions indicating both are switching-regulator outputs and electrically the same function. - Pin 36 is written
GPIO[11]_/_PDN; datasheet listsPDn / GPIO[11]. Function is recognizable, but canonical ordering/case differs. - All 77 terminals have
Pin Type: Unspecified. Datasheet types are available (P, I, O, I/O) and should be populated for useful ERC behavior. - No terminal has a Pin Description property. Datasheet descriptions should be added, especially for power voltages, RF polarity/path, active-low LED behavior, USB pair direction, RREF’s required 6.2 kΩ ±1% resistor to ground, PDn shutdown behavior, and exposed-pad grounding.
- Project description omits the USB 2.0/3.0 interface phrase from the datasheet title.
- Part Type is empty and should be classified as a wireless LAN / RF transceiver or network-interface controller IC.
Footprint Cross-Check
Confirmed geometry
- 76 perimeter pads plus one exposed pad: correct total of 77.
- 9.0 × 9.0 mm body outline: matches datasheet.
- 0.40 mm perimeter-pad pitch: matches datasheet.
- Perimeter pad width 0.20 mm: matches nominal lead width
b = 0.20 mmand remains within the 0.15–0.25 mm lead-width range. - Pin-1 marker and chamfer are located at the pin-1 corner.
- Exposed pad is 6.06 × 6.56 mm, equal to the datasheet maximum D2/E2 exposed-pad dimensions.
Footprint risks / unverified items
- The datasheet gives package mechanical dimensions but does not provide a recommended PCB land pattern. Therefore, the perimeter land length and toe/heel extensions cannot be fully certified from this document alone.
- The central copper/paste/mask pad is a single 6.06 × 6.56 mm rectangle, using the maximum exposed-pad dimensions. A PCB land is normally derived from nominal tolerances and assembly requirements rather than copied at maximum package size. This should be checked against Realtek’s recommended land pattern or an IPC-7351 calculation.
- The exposed pad uses one full-size paste opening. For a large thermal pad, segmented paste apertures are normally preferred to limit solder volume and voiding; the current footprint may cause package float or excessive voiding. This is a manufacturability concern even though the copper outline matches the package envelope.
- No thermal-via pattern is included. Whether vias are required depends on the reference layout and thermal/RF grounding guidance, which was not present in the extracted mechanical section.
- Footprint name ends in
77N-D, while the datasheet calls the package QFN-76 with exposed pad 77. This is naming-only and not inherently incorrect.
Overall Assessment
Correction Status — Implemented 10 August 2026
- Corrected pin 41 to HSDP, pin 42 to HSDM, and pin 43 to GND (
GND_1is retained as the unique Flux terminal designator). - Corrected pin 50 from
GN_DtoGND. - Added datasheet-derived electrical Pin Types and Pin Descriptions to all 77 terminals.
- Added RF/WLAN network-interface-controller classification, QFN-76-EP package metadata, SMD mount, 3.3 V external supply, 0–70 °C operating range, WiFi/USB connectivity, manufacturer, and MPN metadata.
- Expanded the part description to include the USB 2.0/3.0 interface.
- Preserved exposed-pad copper and solder-mask size at 6.06 × 6.56 mm.
- Applied −0.70 mm solder-paste expansion to pad 77, producing a centered 4.66 × 5.16 mm aperture and approximately 60.5% paste coverage.
- A true 3×3 window-pane stencil could not be represented safely by the current source-footprint API without introducing additional electrically mapped pad nodes. The reduced single aperture is the implemented platform-safe fallback.
- Read-back verification confirmed 77 unique pins numbered 1–77, 77 footprint pads, corrected USB sequence, and unchanged 9 × 9 mm / 0.4 mm-pitch perimeter geometry.
Current Assessment
The critical electrical symbol errors and missing metadata have been corrected. The part is substantially safer to reuse. Before high-volume production, the QFN land pattern, thermal-via strategy, and the fallback single-aperture stencil should still be reviewed with the assembler or against an authoritative Realtek reference layout.
Recommended Corrections
- Correct pins 41–43 to HSDP, HSDM, and GND respectively.
- Rename pin 50 from
GN_DtoGND. - Populate all Pin Type fields from the datasheet.
- Add pin descriptions for all 77 terminals.
- Set Part Type and expand the description to include USB 2.0/3.0.
- Validate the QFN land pattern against an authoritative Realtek recommendation or an IPC-7351 calculation.
- Segment the exposed-pad paste aperture and consider grounded thermal vias per the manufacturer/reference layout.
Source Notes
- Stored Datasheet URL: https://datasheetspdf.com/pdf-file/964063/RealtekMicroelectronics/RTL8812AU-CG/1
- Official Realtek product page: https://www.realtek.com/Product/Index?cate_id=194&id=579
- Cross-check source: RTL8812AU-CG Datasheet Rev. 0.2, Realtek Semiconductor Corp., Track ID JATR-2265-11.
Scope
Existing Part Information
Key Datasheet Specifications
Schematic Symbol Cross-Check
Confirmed matches
Definite symbol mismatches
Naming and metadata issues
Footprint Cross-Check
Confirmed geometry
Footprint risks / unverified items
Overall Assessment
Correction Status — Implemented 10 August 2026
Current Assessment
Recommended Corrections
Source Notes
