RK806S Part Review

flux

Got it — I’ll keep the existing pins and numbers intact, and only populate orientation, section, and terminal order based on the RK806S datasheet.
Created a project doc

RK806S-5 Part Review

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Date: 2026-07-12 Reviewed the RK806S-5 Flux part project against the Rockchip RK806S Datasheet Rev. 1.5. Checked available metadata, datashe...

flux

Completed the RK806S-5 review and applied the requested pin organization properties without changing pin numbers, names, or mappings. I also created the full review report here: RK806S-5 Part Review.
Open items:
  • Package metadata is still generic (QFN); datasheet is more specific: QFN68 / QFN-68(7x7).
  • Pin Type and Pin Description properties remain incomplete because the requested edit was limited to orientation, section, and terminal order.
Suggested next steps:
  1. Update Package or Case Code to QFN-68(7x7).
  2. Populate Pin Type and Pin Description from the datasheet.
  3. Check the exposed-pad paste/land pattern against any manufacturer-recommended PCB land pattern.
Fix metadata and review
Update package metadata
Populate pin details
Check land pattern
Run ERC and DRC
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RK806S-5 Part Review
Date: 2026-07-12
Scope
Reviewed the RK806S-5 Flux part project against the Rockchip RK806S Datasheet Rev. 1.5. Checked available metadata, datasheet URL status, schematic symbol terminal names/numbers, footprint pad count/dimensions, and assigned symbol organization properties requested by the user: Pin Orientation, Section, and Terminal Order.
No pins were replaced, pin numbers were not changed, and no pins were remapped.
Datasheet source
  • Existing project Datasheet URL was already populated: https://storage.googleapis.com/graviton-electric-symbols/document_assets/user-uploaded/cd9d51cfbe3563d7bf506dc71497b5a474500be35e0bc1e986b5d0ded1b23bfc.pdf
  • Public Rockchip-copyright datasheet found for cross-check: https://rockchip.fr/RK806S%20datasheet%20V1.5.pdf
  • Datasheet: RK806S Datasheet Rev. 1.5, July 2024.
Because a Datasheet URL was already set, the Datasheet property was not changed.
Key datasheet specs

Table

ItemDatasheet value
ManufacturerRockchip Electronics
MPN / orderable variantRK806S-5
FunctionComplex PMIC / power-management IC
PackageQFN68, 7 mm x 7 mm, exposed pad
Pin count68 perimeter pins + exposed ePAD ground
Pitch0.35 mm
Input range2.7 V to 5.5 V
Standby current10 uA
Buck converters10 synchronous step-down converters
LDOs6 PMOS LDOs + 5 NMOS LDOs
InterfacesI2C and SPI
Operating junction temperature-40 C to +125 C
Storage temperature-40 C to +150 C
Power dissipation2 W max
Compliance/order tableRoHS, QFN68 (7x7), reel packaging
Footprint check
Flux footprint asset: QFN35P700X700X90-69N-D.kicad_mod

Table

Footprint itemFlux valueDatasheet valueResult
Perimeter pads6868Match
Exposed pad1, named GND / pad 69ePAD = GroundMatch
Total pads6968 + exposed padMatch
Body/fab outline7 mm x 7 mmD/E nominal 7.00 mmMatch
Pitch0.35 mm0.35 mm BSCMatch
Perimeter pad width0.15 mmb nominal 0.15 mmMatch
Exposed pad size5.59 mm x 5.59 mmD2/E2 max 5.59 mm; nominal 5.49 mmAcceptable to check against land pattern
No critical footprint mismatch was found from package dimensions. The only caveat is that final manufacturability should compare solder land/paste/mask apertures against the datasheet recommended PCB land pattern if available, not only the package mechanical drawing.
Symbol pin-name and pin-number comparison
The symbol has 69 terminal components: pins 1-68 plus GND pin 69 for the exposed pad. Pins 1-68 match the datasheet pin names and numbers. Duplicate functional pins are made unique in Flux by suffixes, which is acceptable and does not indicate remapping:

Table

Datasheet duplicateFlux terminals
VCC2 pins 33/34VCC2_1 / VCC2_2
SW2 pins 35/36SW2_1 / SW2_2
SW1 pins 50/51SW1_1 / SW1_2
VCC1 pins 52/53VCC1_1 / VCC1_2
ePAD GroundGND pin 69
Metadata issues / mismatches flagged

Table

AreaFindingSeverity
Pin numbers/namesMatch datasheet; suffixes only on duplicate functional pinsOK
Exposed padCorrectly represented as GND / pin 69OK
Footprint69 pads, 0.35 mm pitch, 7x7 body, exposed pad consistent with datasheetOK
Package propertyProject property is QFN; datasheet/order table is more specific: QFN68 / QFN-68(7x7)Minor metadata mismatch
Pin Type propertiesAll terminals remain Unspecified; not requested to change in the follow-up taskMetadata incomplete
Pin Description propertiesNot populated; datasheet pin descriptions are availableMetadata incomplete
Datasheet propertyAlready populated before reviewOK
Applied symbol organization assignments
The following properties were assigned directly to the schematic terminal components:
  • Pin Orientation
  • Section
  • Terminal Order
Power pins were placed first. Ground was placed last. Analog feedback pins, switching/output pins, controls, digital synchronization pins, and I2C/SPI interface pins were placed between them. Existing pin numbers and terminal names were preserved.
Note: Flux accepted the requested section values. Some section labels such as Output, Digital, and Ground are not in the default autocomplete list, but they were intentionally applied to match the user's requested classification scheme.

Table

OrderPin No.TerminalSectionOrientationDatasheet basis
11VCC9PowerleftPower supply of buck9
27VCC8PowerleftPower supply of buck8
39VCC14PowerleftPower supply of NLDO4/5
413VCC13PowerleftPower supply of NLDO1/2/3
521VCCAPowerleftAnalog/system logic supply
622VCC4PowerleftPower supply of buck4
727VCC10PowerleftPower supply of buck10
828VCC6PowerleftPower supply of buck6
933VCC2_1PowerleftPower supply of buck2
1034VCC2_2PowerleftPower supply of buck2
1143VCC7PowerleftPower supply of buck7
1244VCC5PowerleftPower supply of buck5
1352VCC1_1PowerleftPower supply of buck1
1453VCC1_2PowerleftPower supply of buck1
1554VCC3PowerleftPower supply of buck3
1659VCC11PowerleftPower supply of PLDO1/2/3
1764VCC12PowerleftPower supply of PLDO4/5
1820VCCIOPowerleftI2C/SPI supply output
192SYNCDigitalleftMaster/slave synchronization signal
203SYNC_CLKDigitalleft32 kHz synchronization clock
214PWRONControlleftPower-on key input
2232VDCControlleftVDC power-on signal
2339EXT_ENControlleftExtended DCDC enable / master-slave select
2440RESETBControlleftReset AP
2562PWRCRTL1ControlleftPWRCRTL1 control
2661PWRCRTL2ControlleftPWRCRTL2 control
2719INTControlrightInterrupt output
2815MOSI/SDAInterfaceleftSPI MOSI / I2C SDA
2916MISO/PWRCRTL3InterfacerightSPI MISO / PWRCRTL3
3017CLK/SCLInterfaceleftSPI CLK / I2C SCL
3118CSInterfaceleftSPI CS / interface-mode select
3249VOUT1AnalogrightBuck1 output feedback voltage
3348FB1AnalogrightBuck1 external feedback
3437VOUT2AnalogrightBuck2 output feedback voltage
3538FB2AnalogrightBuck2 external feedback
3656VOUT3AnalogrightBuck3 output feedback voltage
3724VOUT4AnalogrightBuck4 output feedback voltage
3846VOUT5AnalogrightBuck5 output feedback voltage
3947FB5AnalogrightBuck5 external feedback
4030VOUT6AnalogrightBuck6 output feedback voltage
4131FB6AnalogrightBuck6 external feedback
4241VOUT7AnalogrightBuck7 output feedback voltage
435VOUT8AnalogrightBuck8 output feedback voltage
4467VOUT9AnalogrightBuck9 output feedback voltage
4566FB9AnalogrightBuck9 external feedback
4625VOUT10AnalogrightBuck10 output feedback voltage
4750SW1_1OutputrightBuck1 switching node
4851SW1_2OutputrightBuck1 switching node
4935SW2_1OutputrightBuck2 switching node
5036SW2_2OutputrightBuck2 switching node
5155SW3OutputrightBuck3 switching node
5223SW4OutputrightBuck4 switching node
5345SW5OutputrightBuck5 switching node
5429SW6OutputrightBuck6 switching node
5542SW7OutputrightBuck7 switching node
566SW8OutputrightBuck8 switching node
5768SW9OutputrightBuck9 switching node
5826SW10OutputrightBuck10 switching node
5914NLDO1OutputrightNMOS LDO1 output
6012NLDO2OutputrightNMOS LDO2 output
6111NLDO3OutputrightNMOS LDO3 output
6210NLDO4OutputrightNMOS LDO4 output
638NLDO5OutputrightNMOS LDO5 output
6460PLDO1OutputrightPMOS LDO1 output
6558PLDO2OutputrightPMOS LDO2 output
6657PLDO3OutputrightPMOS LDO3 output
6763PLDO4OutputrightPMOS LDO4 output
6865PLDO5OutputrightPMOS LDO5 output
6969GNDGroundbottomExposed ePAD ground
Verification performed after mutation
After assignment, schematic inspection confirmed the new Pin Orientation, Section, and Terminal Order properties are present on the terminals. The layout still reports 69 pads, consistent with the reviewed footprint and exposed pad mapping.

  • Scope

  • Datasheet source

  • Key datasheet specs

  • Footprint check

  • Symbol pin-name and pin-number comparison

  • Metadata issues / mismatches flagged

  • Applied symbol organization assignments

  • Verification performed after mutation