RK806S Part Review
RK806S-5 Part Review
QFN); datasheet is more specific: QFN68 / QFN-68(7x7).QFN-68(7x7).Pin Orientation, Section, and Terminal Order.https://storage.googleapis.com/graviton-electric-symbols/document_assets/user-uploaded/cd9d51cfbe3563d7bf506dc71497b5a474500be35e0bc1e986b5d0ded1b23bfc.pdfhttps://rockchip.fr/RK806S%20datasheet%20V1.5.pdfTable
| Item | Datasheet value |
|---|---|
| Manufacturer | Rockchip Electronics |
| MPN / orderable variant | RK806S-5 |
| Function | Complex PMIC / power-management IC |
| Package | QFN68, 7 mm x 7 mm, exposed pad |
| Pin count | 68 perimeter pins + exposed ePAD ground |
| Pitch | 0.35 mm |
| Input range | 2.7 V to 5.5 V |
| Standby current | 10 uA |
| Buck converters | 10 synchronous step-down converters |
| LDOs | 6 PMOS LDOs + 5 NMOS LDOs |
| Interfaces | I2C and SPI |
| Operating junction temperature | -40 C to +125 C |
| Storage temperature | -40 C to +150 C |
| Power dissipation | 2 W max |
| Compliance/order table | RoHS, QFN68 (7x7), reel packaging |
QFN35P700X700X90-69N-D.kicad_modTable
| Footprint item | Flux value | Datasheet value | Result |
|---|---|---|---|
| Perimeter pads | 68 | 68 | Match |
| Exposed pad | 1, named GND / pad 69 | ePAD = Ground | Match |
| Total pads | 69 | 68 + exposed pad | Match |
| Body/fab outline | 7 mm x 7 mm | D/E nominal 7.00 mm | Match |
| Pitch | 0.35 mm | 0.35 mm BSC | Match |
| Perimeter pad width | 0.15 mm | b nominal 0.15 mm | Match |
| Exposed pad size | 5.59 mm x 5.59 mm | D2/E2 max 5.59 mm; nominal 5.49 mm | Acceptable to check against land pattern |
GND pin 69 for the exposed pad. Pins 1-68 match the datasheet pin names and numbers. Duplicate functional pins are made unique in Flux by suffixes, which is acceptable and does not indicate remapping:Table
| Datasheet duplicate | Flux terminals |
|---|---|
| VCC2 pins 33/34 | VCC2_1 / VCC2_2 |
| SW2 pins 35/36 | SW2_1 / SW2_2 |
| SW1 pins 50/51 | SW1_1 / SW1_2 |
| VCC1 pins 52/53 | VCC1_1 / VCC1_2 |
| ePAD Ground | GND pin 69 |
Table
| Area | Finding | Severity |
|---|---|---|
| Pin numbers/names | Match datasheet; suffixes only on duplicate functional pins | OK |
| Exposed pad | Correctly represented as GND / pin 69 | OK |
| Footprint | 69 pads, 0.35 mm pitch, 7x7 body, exposed pad consistent with datasheet | OK |
| Package property | Project property is QFN; datasheet/order table is more specific: QFN68 / QFN-68(7x7) | Minor metadata mismatch |
| Pin Type properties | All terminals remain Unspecified; not requested to change in the follow-up task | Metadata incomplete |
| Pin Description properties | Not populated; datasheet pin descriptions are available | Metadata incomplete |
| Datasheet property | Already populated before review | OK |
Pin OrientationSectionTerminal OrderOutput, Digital, and Ground are not in the default autocomplete list, but they were intentionally applied to match the user's requested classification scheme.Table
| Order | Pin No. | Terminal | Section | Orientation | Datasheet basis |
|---|---|---|---|---|---|
| 1 | 1 | VCC9 | Power | left | Power supply of buck9 |
| 2 | 7 | VCC8 | Power | left | Power supply of buck8 |
| 3 | 9 | VCC14 | Power | left | Power supply of NLDO4/5 |
| 4 | 13 | VCC13 | Power | left | Power supply of NLDO1/2/3 |
| 5 | 21 | VCCA | Power | left | Analog/system logic supply |
| 6 | 22 | VCC4 | Power | left | Power supply of buck4 |
| 7 | 27 | VCC10 | Power | left | Power supply of buck10 |
| 8 | 28 | VCC6 | Power | left | Power supply of buck6 |
| 9 | 33 | VCC2_1 | Power | left | Power supply of buck2 |
| 10 | 34 | VCC2_2 | Power | left | Power supply of buck2 |
| 11 | 43 | VCC7 | Power | left | Power supply of buck7 |
| 12 | 44 | VCC5 | Power | left | Power supply of buck5 |
| 13 | 52 | VCC1_1 | Power | left | Power supply of buck1 |
| 14 | 53 | VCC1_2 | Power | left | Power supply of buck1 |
| 15 | 54 | VCC3 | Power | left | Power supply of buck3 |
| 16 | 59 | VCC11 | Power | left | Power supply of PLDO1/2/3 |
| 17 | 64 | VCC12 | Power | left | Power supply of PLDO4/5 |
| 18 | 20 | VCCIO | Power | left | I2C/SPI supply output |
| 19 | 2 | SYNC | Digital | left | Master/slave synchronization signal |
| 20 | 3 | SYNC_CLK | Digital | left | 32 kHz synchronization clock |
| 21 | 4 | PWRON | Control | left | Power-on key input |
| 22 | 32 | VDC | Control | left | VDC power-on signal |
| 23 | 39 | EXT_EN | Control | left | Extended DCDC enable / master-slave select |
| 24 | 40 | RESETB | Control | left | Reset AP |
| 25 | 62 | PWRCRTL1 | Control | left | PWRCRTL1 control |
| 26 | 61 | PWRCRTL2 | Control | left | PWRCRTL2 control |
| 27 | 19 | INT | Control | right | Interrupt output |
| 28 | 15 | MOSI/SDA | Interface | left | SPI MOSI / I2C SDA |
| 29 | 16 | MISO/PWRCRTL3 | Interface | right | SPI MISO / PWRCRTL3 |
| 30 | 17 | CLK/SCL | Interface | left | SPI CLK / I2C SCL |
| 31 | 18 | CS | Interface | left | SPI CS / interface-mode select |
| 32 | 49 | VOUT1 | Analog | right | Buck1 output feedback voltage |
| 33 | 48 | FB1 | Analog | right | Buck1 external feedback |
| 34 | 37 | VOUT2 | Analog | right | Buck2 output feedback voltage |
| 35 | 38 | FB2 | Analog | right | Buck2 external feedback |
| 36 | 56 | VOUT3 | Analog | right | Buck3 output feedback voltage |
| 37 | 24 | VOUT4 | Analog | right | Buck4 output feedback voltage |
| 38 | 46 | VOUT5 | Analog | right | Buck5 output feedback voltage |
| 39 | 47 | FB5 | Analog | right | Buck5 external feedback |
| 40 | 30 | VOUT6 | Analog | right | Buck6 output feedback voltage |
| 41 | 31 | FB6 | Analog | right | Buck6 external feedback |
| 42 | 41 | VOUT7 | Analog | right | Buck7 output feedback voltage |
| 43 | 5 | VOUT8 | Analog | right | Buck8 output feedback voltage |
| 44 | 67 | VOUT9 | Analog | right | Buck9 output feedback voltage |
| 45 | 66 | FB9 | Analog | right | Buck9 external feedback |
| 46 | 25 | VOUT10 | Analog | right | Buck10 output feedback voltage |
| 47 | 50 | SW1_1 | Output | right | Buck1 switching node |
| 48 | 51 | SW1_2 | Output | right | Buck1 switching node |
| 49 | 35 | SW2_1 | Output | right | Buck2 switching node |
| 50 | 36 | SW2_2 | Output | right | Buck2 switching node |
| 51 | 55 | SW3 | Output | right | Buck3 switching node |
| 52 | 23 | SW4 | Output | right | Buck4 switching node |
| 53 | 45 | SW5 | Output | right | Buck5 switching node |
| 54 | 29 | SW6 | Output | right | Buck6 switching node |
| 55 | 42 | SW7 | Output | right | Buck7 switching node |
| 56 | 6 | SW8 | Output | right | Buck8 switching node |
| 57 | 68 | SW9 | Output | right | Buck9 switching node |
| 58 | 26 | SW10 | Output | right | Buck10 switching node |
| 59 | 14 | NLDO1 | Output | right | NMOS LDO1 output |
| 60 | 12 | NLDO2 | Output | right | NMOS LDO2 output |
| 61 | 11 | NLDO3 | Output | right | NMOS LDO3 output |
| 62 | 10 | NLDO4 | Output | right | NMOS LDO4 output |
| 63 | 8 | NLDO5 | Output | right | NMOS LDO5 output |
| 64 | 60 | PLDO1 | Output | right | PMOS LDO1 output |
| 65 | 58 | PLDO2 | Output | right | PMOS LDO2 output |
| 66 | 57 | PLDO3 | Output | right | PMOS LDO3 output |
| 67 | 63 | PLDO4 | Output | right | PMOS LDO4 output |
| 68 | 65 | PLDO5 | Output | right | PMOS LDO5 output |
| 69 | 69 | GND | Ground | bottom | Exposed ePAD ground |
Pin Orientation, Section, and Terminal Order properties are present on the terminals. The layout still reports 69 pads, consistent with the reviewed footprint and exposed pad mapping.Scope
Datasheet source
Key datasheet specs
Footprint check
Symbol pin-name and pin-number comparison
Metadata issues / mismatches flagged
Applied symbol organization assignments
Verification performed after mutation