NAU7802SGI Review


  • Make the functional group more general.
  • Add a Section property to all pins, and apply the same value used in the Pin Group property to each pin's Section property.
Assign a Terminal Order from 1 to 10, starting with Power. Power should be Terminal Order 1, and Ground should be last, Terminal Order 10. For Orientation, set Power to "Top" and Ground to "Bottom." For the remaining sections/groups, you may decide the Terminal Order and Orientation yourself. For Orientation, distribute them between "Left" and "Right" โ€” don't put everything on one side. Each group/section should have a different orientation.
Iโ€™ll generalize the pin groups, mirror each Pin Group into Section, and set Terminal Order/Orientation with Power first/top and Ground last/bottom while distributing the other groups left/right.
Updated the pin organization to more general groups: Power, Analog, Interface, and Ground.
Open items:
  • None.
Suggested next steps:
  1. Review the symbol visually to confirm the left/right grouping looks natural.
  2. Publish/update the part if the grouping matches your convention.
Arrange and review
Arrange symbol
Run part review
Update review file
Publish readiness check

DVSS
Pin Number
9
AVDD/LDO
Pin Number
16
XIN
Pin Number
10
DRDY
Pin Number
12
REFP
Pin Number
1
SDIO
Pin Number
14
VIN2N
Pin Number
4
VIN2P
Pin Number
5
XOUT
Pin Number
11
DVDD
Pin Number
15
VIN1P
Pin Number
3
VIN1N
Pin Number
2
REFN
Pin Number
7
AVSS
Pin Number
8
VBG
Pin Number
6
SCLK
Pin Number
13
Name
Pin #
Type
Part Type
Pin Description
Pin Group
REFP
1
Input
Terminal
Positive reference input.
Analog
VIN1N
2
Input
Terminal
Channel 1 inverting analog input.
Analog
VIN1P
3
Input
Terminal
Channel 1 non-inverting analog input.
Analog
VIN2N
4
Input
Terminal
Channel 2 inverting analog input.
Analog
VIN2P
5
Input
Terminal
Channel 2 non-inverting analog input.
Analog
VBG
6
Output
Terminal
High-impedance reference voltage output and bypass pin.
Analog
REFN
7
Input
Terminal
Negative reference input.
Analog
AVSS
8
Ground
Terminal
Analog ground.
Ground
DVSS
9
Ground
Terminal
Digital ground.
Ground
XIN
10
Input
Terminal
External crystal oscillator input, typically 4.9152 MHz.
Interface
XOUT
11
Output
Terminal
External crystal oscillator output.
Interface
DRDY
12
Output
Terminal
Data-ready output indicating conversion complete and new data available for readout.
Interface
SCLK
13
Input
Terminal
Serial data clock input for 2-wire interface; datasheet notes CMOS open-drain output behavior.
Interface
SDIO
14
Bi-Directional
Terminal
Serial data input/output for communication with host; open-drain 2-wire data line.
Interface
DVDD
15
Power In
Terminal
Digital power supply, 2.7 V to 5.5 V.
Power
AVDD/LDO
16
Power In
Terminal
Analog power supply / programmable LDO output; external AVDD 2.7 V to 5.5 V when LDO is off, low-ESR bypass capacitor recommended.
Power

NAU7802SGI

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