Pin Function Grouping


Grouped and verified all 24 pins:
  • Power: 3V3 (VCC), Ground (GND)
  • SPI Interface: control and data I/O
  • Control: reset
  • Reserved: no-connect and do-not-use pins
Pin numbers and footprint mappings were preserved.
Separate GND from Power Group, make a Ground Group
GND is now separated into its own Ground section and Ground pin group.
Assign a Terminal Order from 1 to 10, starting with Power. Power should be Terminal Order 1, and Ground should be last, Terminal Order 10. For Orientation, set Power to "Top" and Ground to "Bottom." For the remaining sections/groups, you may decide the Terminal Order and Orientation yourself. For Orientation, distribute them between "Left" and "Right" — don't put everything on one side. Each group/section should have a different orientation.
I’ll organize the symbol into ten ordered functional groups: Power first, Ground last, and the signal/reserved groups split evenly across the left and right sides.
Assigned and verified Terminal Orders 1–10:
  • Power: 1, Top
  • Orders 2–5: Left
  • Orders 6–9: Right
  • Ground: 10, Bottom
All pins are grouped consistently with their assigned orientation.
Verify symbol arrangement
Set pin electrical types
Review BGA footprint
Add pin descriptions

NC_2
Pin Number
A3
NC_1
Pin Number
A2
DNU
Pin Number
A5
RESET#
Pin Number
A4
Name
Pin #
Type
Part Type
Pin Group
Pin Orientation
Section
Terminal Order
NC_1
A2
Unspecified
Terminal
Reserved
Right
Reserved
9
NC_2
A3
Unspecified
Terminal
Reserved
Right
Reserved
9
RESET#
A4
Unspecified
Terminal
Reset
Left
Control
2
DNU
A5
Unspecified
Terminal
Reserved
Right
Reserved
9
NC_3
B1
Unspecified
Terminal
Reserved
Right
Reserved
9
SCLK
B2
Unspecified
Terminal
Clock
Left
SPI Interface
4
GND
B3
Unspecified
Terminal
Ground
Bottom
Ground
10
VCC
B4
Unspecified
Terminal
3V3
Top
Power
1
NC_4
B5
Unspecified
Terminal
Reserved
Right
Reserved
9
NC_5
C1
Unspecified
Terminal
Reserved
Right
Reserved
9
CS#
C2
Unspecified
Terminal
Chip Select
Left
SPI Interface
3
NC_6
C3
Unspecified
Terminal
Reserved
Right
Reserved
9
WP#/SIO2
C4
Unspecified
Terminal
SIO2
Right
SPI Interface
7
NC_7
C5
Unspecified
Terminal
Reserved
Right
Reserved
9
NC_8
D1
Unspecified
Terminal
Reserved
Right
Reserved
9
SO/SIO1
D2
Unspecified
Terminal
SIO1
Right
SPI Interface
6
SI/SIO0
D3
Unspecified
Terminal
SIO0
Left
SPI Interface
5
NC/SIO3
D4
Unspecified
Terminal
SIO3
Right
SPI Interface
8
NC_9
D5
Unspecified
Terminal
Reserved
Right
Reserved
9
NC_10
E1
Unspecified
Terminal
Reserved
Right
Reserved
9
NC_11
E2
Unspecified
Terminal
Reserved
Right
Reserved
9
NC_12
E3
Unspecified
Terminal
Reserved
Right
Reserved
9
NC_13
E4
Unspecified
Terminal
Reserved
Right
Reserved
9

MX66L2G45GXRI00