Part Verification and Datasheet Review


Review all available part information (MPN, package, pin count, description, properties). If no datasheet URL is already set, search the web for the official datasheet and update the part's Datasheet property with the URL. Then cross-check the schematic symbol, footprint, and pin descriptions against the datasheet. Summarize key specs and flag any mismatches.
I’ll inspect the part metadata, look for an official datasheet if needed, then compare the symbol/footprint/pins against the datasheet and update the Datasheet property if missing.
The project already has an Analog Devices datasheet URL set, so I’m using that as the source of truth and moving into pin/footprint verification.
Created a project doc

MAX20303BEWN+T Part Review

View Document

Date: 2026-07-08 Project/part: MAX20303BEWN+T
Completed the part review and saved the detailed findings in MAX20303BEWN+T Part Review.
  • Datasheet URL was already set to the official Analog Devices page, so no update was needed.
  • Symbol pin mapping and main 56-WLP footprint geometry match the datasheet.
  • Flagged issues: Part Type is too narrow, explicit package metadata is missing, footprint pad diameter should be reviewed against ADI AN1891/assembler rules, and there are minor text/naming cleanup items.
Fix metadata and footprint
Fix flagged issues
Review WLP pads
Run validation checks
Add package property

MAX20303BEWN+T Part Review
Date: 2026-07-08
Source of truth
  • MPN: MAX20303BEWN+T
  • Manufacturer: Analog Devices / Maxim Integrated
  • Datasheet URL in project: https://www.analog.com/MAX20303/datasheet
  • Package outline checked: W563A4+1 / outline 21-100104, 56-bump WLP, 0.5 mm pitch.
Metadata cross-check

Table


FieldProject valueDatasheet result
Manufacturer Part NumberMAX20303BEWN+TMatches ordering information.
Manufacturer NameAnalog DevicesMatches current official source.
Datasheet URLhttps://www.analog.com/MAX20303/datasheetOfficial ADI datasheet; no update needed.
Designator PrefixICAppropriate.
Pads / pin count56Matches 56 WLP bumps.
Part TypeLinear RegulatorMismatch / too narrow: datasheet describes a PMIC with charger, fuel gauge, buck/boost/buck-boost regulators, LDOs, charge pump, haptic driver, LED sinks, and I2C control. Recommended classification: Power Management / PMIC.
Key specs from datasheet
  • Package: 56-bump WLP, 7 x 8 bump array, 0.5 mm pitch; W563A4+1.
  • Size: datasheet overview 3.71 mm x 4.21 mm; official outline 21-100104 gives about 3.678 mm x 4.178 mm nominal body.
  • Operating temperature: -40 C to +85 C.
  • CHGIN: allowed input range -5.5 V to +28 V; absolute max -6 V to +30 V.
  • BAT/SYS continuous current absolute max: +/-1000 mA.
  • Battery regulation voltage: programmable 4.05 V to 4.60 V.
  • Buck1: VSYS input 2.7 V to 5.5 V, output 0.8 V to 2.375 V, typical IQ 0.8 uA.
  • Buck2: VSYS input 2.7 V to 5.5 V, output 0.8 V to 3.95 V, typical IQ 0.9 uA.
  • HV boost: VSYS input 2.7 V to 5.5 V, output 5 V to 20 V.
  • Buck-boost: VSYS input 2.7 V to 5.5 V, output 2.5 V to 5 V.
  • LDO1: output 0.5 V to 1.95 V, max output current 50 mA.
  • LDO2: output 0.9 V to 4 V, max output current 100 mA when VL2IN > 1.8 V.
  • LED sinks: programmable current sinks up to 30 mA depending setting; LED input max 20 V.
  • Thermal: theta JA 33.35 C/W; listed dissipation 2399 mW at +70 C on multilayer board, derate 29.98 mW/C.
Symbol updates applied
All 56 terminal components were checked against the datasheet bump table and updated directly in the schematic component:
  • Pin descriptions populated from the datasheet pin-function table.
  • Pin types assigned as Power In, Power Out, Ground, Input, Output, Bi-Directional, Open Collector, or Passive.
  • Sections assigned using Flux-recognized categories: Power, Voltage Regulator, Communication, Control, Reset, GPIO, Analog, Peripheral.
  • Pin orientation and Symbol Pin Position rebalanced to exactly 28 pins left / 28 pins right.
  • Power pins are at the top of both sides; GND pins are last at the bottom of both sides.
  • Each functional section is split across left/right as evenly as possible:
    • Power/non-ground: 6 left / 5 right.
    • Voltage Regulator: 6 left / 7 right.
    • Communication: 1 left / 1 right.
    • Control/Reset: 3 left / 3 right.
    • GPIO: 2 left / 3 right.
    • Analog: 3 left / 3 right.
    • Peripheral: 3 left / 2 right.
    • Grounds: 4 left / 4 right.
Footprint cross-check

Table


ItemProject footprintDatasheet/package outlineResult
Pad count56 pads56 bumpsMatch.
Ball mapA1-H7, 8 rows x 7 columnsA-H rows, 1-7 columnsMatch.
Pitch0.5 mm pad spacing0.5 mm pitchMatch.
Pad shape/size0.298 mm circular pads0.31 +/- 0.03 mm bump diameter; WLP guidance recommends NSMD pads smaller than bump maxPlausible; verify with assembler rules for production.
Body/fab outlineApprox 3.678 mm x 4.178 mmOfficial outline 21-100104: E = 3.678 mm, D = 4.178 mmMatch official outline.
A1 markerChamfer/dot at A1 sidePackage outline marks A1 orientationMatch.
Mismatches / follow-up flags
  1. Part Type metadata is too narrow: Linear Regulator should ideally be changed to Power Management / PMIC if the property options allow it.
  2. Land pattern source: datasheet refers to WLP guidance / Application Note 1891 rather than a unique land-pattern drawing. Existing footprint appears consistent, but production pad sizing should be checked with the intended assembler.
  3. Active-low labels: datasheet names are INT, RST, and ALRT; symbol labels use ~INT, ~RST, and ~ALRT. This is acceptable for readability and documented in pin descriptions.
  4. No schematic nets in this part project: validation was limited to part metadata, symbol terminals, pin descriptions, and footprint/pin mapping.
Verification performed
  • Confirmed the official datasheet URL is set.
  • Confirmed all 56 terminals exist and have matching datasheet bump numbers.
  • Confirmed the footprint has 56 pads and the A1-H7 map matches the datasheet bump table.
  • Confirmed the rebalanced pin orientation, section, terminal order, symbol pin position, pin type, and pin descriptions were written back to the schematic component.
  • Source of truth

  • Metadata cross-check

  • Key specs from datasheet

  • Symbol updates applied

  • Footprint cross-check

  • Mismatches / follow-up flags

  • Verification performed