Pin Type Update for LMR38010SDDAR

A

aaron0624

flux

Task: change only the pin electrical types of this LMR38010SDDAR part, then publish a new version
This part project (owner aaron0624) is used as U1 in the project aaron0624/isolated-uart-rs485-adapter. Do NOT change pin names, pin numbers, symbol layout, footprint, pads, 3D model or any other property. Only change the Pin Type property of these terminals:

Table

Pin #NameNew Pin Type
1GNDGround
9EPGround
7BOOTPassive
2ENPassive
4RT_SYNCPassive
5FBPassive
3VINPassive
Leave pins 6 (PG) and 8 (SW) unchanged.
Steps:
  1. Read the symbol pins table and record current pin types.
  2. Edit the Pin Type property on the 7 terminals above.
  3. Re-read the pins table and confirm all 9 pins, names and numbers are unchanged and the 7 types are as listed.
  4. Publish a new part version with change notes: "Pin types only: GND/EP=Ground; BOOT/EN/RT_SYNC/FB/VIN=Passive. Footprint unchanged."
  5. Report the new published version ID, the before/after pin type table, and confirm the footprint was not touched.

flux

Blocked: this session targets silicon-yard/lmr38010sddar with view-only access, not the requested aaron0624-owned copy. I made no edits, did not publish, and did not touch the footprint.
Current pin types: 1 GND=Ground; 2 EN=Input; 3 VIN=Power In; 4 RT_SYNC=Input; 5 FB=Input; 6 PG=Open Collector; 7 BOOT=Power In; 8 SW=Power Out; 9 EP=Ground. Please retarget this task to the editable aaron0624-owned part project.

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Part Audit Report
Scope
Audit of LMR38010SDDAR part metadata, schematic terminals, rendered symbol, and default PCB footprint against the Texas Instruments LMR38010 datasheet and DDA0008B package drawing.
Available Part Information

Table

FieldCurrent valueAudit result
Manufacturer Part NumberLMR38010SDDARMatch
ManufacturerTexas InstrumentsMatch
Description4.2–80 V, 1 A synchronous adjustable buck converter with 40 µA IQ, adjustable frequency, power-good, spread spectrum, DDA PowerPAD packageSubstantively correct
Datasheet URLExisting uploaded PDF URLPresent; no update required by request. Official TI URL verified above.
PackageDDA, 8-pin HSOIC PowerPAD / PowerSOIC plus exposed thermal padMatch
Logical terminal count9Correct: 8 numbered leads plus exposed thermal pad represented as pin 9
Project package propertyNot explicitly setMetadata gap; package is only evident from description and footprint asset name
Key Device Specifications
  • Synchronous step-down converter, PFM variant with spread spectrum.
  • Input operating range: 4.2 V to 80 V after startup; device can continue operating down to 3.8 V once running.
  • Adjustable output range: 1 V to 75 V.
  • Continuous output current: 1 A (application/thermal derating can apply).
  • Switching-frequency adjustment: 200 kHz to 2.2 MHz; external synchronization: 300 kHz to 2.1 MHz.
  • Typical non-switching quiescent current: 40 µA; typical shutdown current 3 µA, maximum 10 µA.
  • Recommended junction-temperature range: –40 °C to +150 °C.
  • Nominal package size including leads: 4.89 mm × 3.90 mm; DDA package uses 1.27 mm lead pitch and an exposed thermal pad.
Pin Cross-Check

Table

PinFlux name/typeDatasheet functionResult
1GND / Power InPower and analog groundNumber/name match; electrical type should be Ground, not Power In
2EN / InputEnable input; must not floatMatch; description missing
3VIN / Power InInput supplyMatch; description missing
4RT_SYNC / UnspecifiedRT/SYNC analog timing resistor or synchronization input; must not float or be groundedNumber/function match; label uses underscore instead of datasheet slash; type and description incomplete
5FB / UnspecifiedAnalog feedback input; must not float or be groundedNumber/name match; type and description incomplete
6PG / Open CollectorOpen-drain power-good outputFunction match; Open Collector is close but Open-Drain output wording/type would be more accurate; description missing
7BOOT / UnspecifiedBootstrap supply; 100 nF capacitor to SWNumber/name match; type and description incomplete
8SW / UnspecifiedRegulator switch node; connects to inductorNumber/name match; should be classified as power/switch-node output and described
9EP / UnspecifiedExposed thermal pad; connect to system groundRepresentation is acceptable, but type should be Ground and description should explicitly require connection to ground
Symbol Findings
  • All nine terminals are present and the pin-number mapping matches the datasheet.
  • Functional placement is generally readable: VIN/EN/RT_SYNC on the left and BOOT/SW/PG/FB/GND/EP on the right.
  • The terminal records do not contain populated Pin Description, section/group, orientation, or terminal-order metadata.
  • Several electrical types are unspecified, reducing ERC usefulness.
Footprint Cross-Check
Matching items
  • Eight perimeter pads plus exposed pad 9 are present.
  • Lead pitch is 1.27 mm, matching the DDA package.
  • Body fabrication outline is approximately 3.90 mm × 4.90 mm, matching the nominal TI package dimensions.
  • Pin-1 marker and lead numbering/orientation are consistent with the top-view datasheet pinout.
  • Exposed-pad location is centered and mapped to EP/pin 9.
Differences / review flags
  • The default footprint is explicitly named DDA0008E-IPC_A, while the current TI datasheet package drawing is DDA0008B. These suffixes describe drawing/land-pattern revisions or density variants rather than a different pinout, but the provenance should be documented.
  • Flux signal pads are approximately 2.474 mm × 0.622 mm. TI’s example board layout shows 1.55 mm × 0.60 mm signal lands. The longer IPC-A pads can be a valid high-density-class variation, but they are not a direct copy of TI’s example land pattern.
  • Flux exposed copper pad is approximately 2.025 mm × 3.10 mm. TI’s example land pattern shows approximately 2.71 mm × 3.40 mm metal for pad 9 (with dimensional variation allowed for creepage). The Flux pad is materially smaller, especially in one axis, and should be checked against the intended IPC-A source and thermal requirements before production.
  • The footprint has a single full-size exposed-pad paste opening of roughly 1.136 mm × 2.211 mm, rather than the segmented paste pattern commonly used for exposed thermal pads. This is not necessarily invalid, but solder-voiding and package float should be reviewed with the assembler.
  • The raw imported footprint dimensions are correct in millimeters, although the scene-tree computed display reports values scaled as meters; the footprint asset payload is the reliable geometry source.
Overall Assessment
Pin numbering and package identity are correct. The main quality gaps are missing terminal descriptions/electrical classifications, absence of an explicit package property, and a default land pattern—especially exposed pad 9—that differs substantially from TI’s current example layout. Treat the footprint as needing engineering verification before manufacturing rather than as a confirmed mismatch, because it is labeled as an IPC-A density variant and TI notes that alternate IPC-7351 designs may be used.
  1. Add complete Pin Description fields for all terminals using the datasheet wording.
  2. Change GND and EP electrical types to Ground; classify RT/SYNC, FB, BOOT, and SW appropriately; represent PG as open-drain if supported.
  3. Add an explicit package property such as DDA (HSOIC-8 PowerPAD).
  4. Confirm the IPC-A land-pattern source for the 2.025 mm × 3.10 mm thermal pad; enlarge or document it if it is not traceable to an approved TI/IPC pattern.
  5. Consider a segmented paste aperture for the thermal pad based on assembly-house guidance.

  • Scope

  • Available Part Information

  • Key Device Specifications

  • Pin Cross-Check

  • Symbol Findings

  • Footprint Cross-Check

  • Matching items

  • Differences / review flags

  • Overall Assessment

  • Recommended Corrections