ESP32-S3 Part Audit

flux

Completed the ESP32-S3 part audit and correction.
  • Set the official Espressif datasheet URL.
  • Verified all pins 1–56 plus exposed GND pad 57 against the datasheet.
  • Added/corrected pin descriptions and electrical types; GPIO46 is correctly input-only.
  • Grouped every pin exactly once into Power, Ground, Enable/Reset, Clock, GPIO/Analog, USB/JTAG, Flash/PSRAM Interface, or RF.
  • Confirmed Section = Pin Group, deterministic ordering, and 57 correctly mapped footprint pads.
  • Verified QFN56, 7 × 7 mm, 0.4 mm pitch; component-review checks are clean.
Remaining flags: the symbol preview has some crowded/missing-glyph rendering, and the exposed-pad paste aperture is unsegmented—electrically valid, though segmented paste may improve assembly yield.
A

adrian95

Assign a Terminal Order from 1 to 10, starting with Power. Power should be Terminal Order 1, and Ground should be last, Terminal Order 10. For Orientation, set Power to "Top" and Ground to "Bottom." For the remaining sections/groups, you may decide the Terminal Order and Orientation yourself. For Orientation, distribute them between "Left" and "Right" — don't put everything on one side. Each group/section should have a different orientation.

flux

I’ll assign one shared order per functional group from 1–10, with Power = 1/Top and Ground = 10/Bottom, then alternate the remaining groups between Left and Right and verify every pin follows its group.

flux

Updated and verified all 57 terminals:
  • 1 — Power: Top
  • 2 — Enable/Reset: Left
  • 3 — Clock: Right
  • 4 — GPIO/Analog: Left
  • 5 — USB/JTAG: Right
  • 6 — Flash/PSRAM interface: Left
  • 7 — RF: Right
  • 10 — Ground: Bottom
Orders 8 and 9 remain unused because the part has eight functional groups. Pin metadata, mappings, descriptions, and sections were preserved.
Improve symbol and checks
Clean symbol rendering
Segment paste aperture
Run final checks
Export part data
Sign up to send

Files

Pins

Symbol

Layout

3D View

Name
Pin #
Type
Part Type
Pin Description
Pin Group
LNA_IN
1
Bi-Directional
Terminal
2.4 GHz RF low-noise-amplifier input/output connection.
RF
VDD3P3_1
2
Power In
Terminal
3.3 V supply input for the analog power domain.
Power
VDD3P3_2
3
Power In
Terminal
3.3 V supply input for the analog power domain.
Power
CHIP_PU
4
Input
Terminal
Chip enable/reset input. High enables the chip; low powers it down. Do not leave floating.
Enable/Reset
GPIO0
5
Bi-Directional
Terminal
GPIO0 / RTC GPIO0; strapping-capable digital I/O with weak pull-up at reset.
GPIO/Analog
GPIO1
6
Bi-Directional
Terminal
GPIO1 / RTC GPIO1 / TOUCH1 / ADC1_CH0.
GPIO/Analog
GPIO2
7
Bi-Directional
Terminal
GPIO2 / RTC GPIO2 / TOUCH2 / ADC1_CH1.
GPIO/Analog
GPIO3
8
Bi-Directional
Terminal
GPIO3 / RTC GPIO3 / TOUCH3 / ADC1_CH2; strapping-capable I/O.
GPIO/Analog
GPIO4
9
Bi-Directional
Terminal
GPIO4 / RTC GPIO4 / TOUCH4 / ADC1_CH3.
GPIO/Analog
GPIO5
10
Bi-Directional
Terminal
GPIO5 / RTC GPIO5 / TOUCH5 / ADC1_CH4.
GPIO/Analog
GPIO6
11
Bi-Directional
Terminal
GPIO6 / RTC GPIO6 / TOUCH6 / ADC1_CH5.
GPIO/Analog
GPIO7
12
Bi-Directional
Terminal
GPIO7 / RTC GPIO7 / TOUCH7 / ADC1_CH6.
GPIO/Analog
GPIO8
13
Bi-Directional
Terminal
GPIO8 / RTC GPIO8 / TOUCH8 / ADC1_CH7; also SUBSPICS1.
GPIO/Analog
GPIO9
14
Bi-Directional
Terminal
GPIO9 / RTC GPIO9 / TOUCH9 / ADC1_CH8; also flash/sub-SPI HD.
GPIO/Analog
GPIO10
15
Bi-Directional
Terminal
GPIO10 / RTC GPIO10 / TOUCH10 / ADC1_CH9; also FSPIIO4 and chip-select functions.
GPIO/Analog
GPIO11
16
Bi-Directional
Terminal
GPIO11 / RTC GPIO11 / TOUCH11 / ADC2_CH0; also FSPIIO5.
GPIO/Analog
GPIO12
17
Bi-Directional
Terminal
GPIO12 / RTC GPIO12 / TOUCH12 / ADC2_CH1; also FSPIIO6.
GPIO/Analog
GPIO13
18
Bi-Directional
Terminal
GPIO13 / RTC GPIO13 / TOUCH13 / ADC2_CH2; also FSPIIO7.
GPIO/Analog
GPIO14
19
Bi-Directional
Terminal
GPIO14 / RTC GPIO14 / TOUCH14 / ADC2_CH3; also FSPIDQS.
GPIO/Analog
VDD3P3_RTC
20
Power In
Terminal
3.3 V supply input for the RTC and part of the digital power domains.
Power
XTAL_32K_P
21
Bi-Directional
Terminal
Positive 32 kHz crystal/clock input-output; multiplexed with GPIO15 and ADC2_CH4.
Clock
XTAL_32K_N
22
Bi-Directional
Terminal
Negative 32 kHz crystal/clock input-output; multiplexed with GPIO16 and ADC2_CH5.
Clock
GPIO17
23
Bi-Directional
Terminal
GPIO17 / RTC GPIO17 / ADC2_CH6; also U1TXD.
GPIO/Analog

ESP32-S3