Pin Grouping by Function

  • Make the functional group more general.
  • Add a Section property to all pins, and apply the same value used in the Pin Group property to each pin's Section property.
Assign a Terminal Order from 1 to 10, starting with Power. Power should be Terminal Order 1, and Ground should be last, Terminal Order 10. For Orientation, set Power to "Top" and Ground to "Bottom." For the remaining sections/groups, you may decide the Terminal Order and Orientation yourself. For Orientation, distribute them between "Left" and "Right" — don't put everything on one side. Each group/section should have a different orientation.
I’ll generalize the pin groups, mirror each Pin Group into Section, and set group-level Terminal Order/Orientation with Power first and Ground last.
Updated all pins to broader functional groups and verified Section matches Pin Group on every terminal.
Open items:
  • None.
Suggested next steps:
  • Review the symbol rendering after the grouping update.
  • Current group order is: Power=1, Interface=2, Control=3, Analog=4, Gate Drive=5, No Connect=9, Ground=10.
Review symbol and ERC
Review rendered symbol
Run ERC check
Use standard group names
Check footprint mapping
SH1
Pin Number
20
SH5
Pin Number
42
IN4
Pin Number
7
GND
Pin Number
57
SH2
Pin Number
23
SN2
Pin Number
18
GND
Pin Number
32
DRVOFF/NFLT
Pin Number
9
SH3
Pin Number
27
CP2L
Pin Number
33
DRAIN
Pin Number
39
GL3
Pin Number
26
NC
Pin Number
40
SDO
Pin Number
3
PVDD
Pin Number
38
DGND
Pin Number
54
SCLK
Pin Number
1
DVDD
Pin Number
55
AGND
Pin Number
11
PGND2
Pin Number
47
IN1
Pin Number
4
GH7
Pin Number
50
CP1L
Pin Number
35
SDI
Pin Number
2
SP1
Pin Number
15
GL2
Pin Number
24
CP2H
Pin Number
34
GL1
Pin Number
19
GL7
Pin Number
48
GH1
Pin Number
21
GH8
Pin Number
51
GL8
Pin Number
53
GL5
Pin Number
41
GH4
Pin Number
29
SH6
Pin Number
45
PGND1
Pin Number
25
GH5
Pin Number
43
NSLEEP
Pin Number
8
BRAKE
Pin Number
14
CP1H
Pin Number
36
IN3
Pin Number
6
GH6
Pin Number
44
SN1
Pin Number
16
NSCS
Pin Number
56
SH4
Pin Number
30
GL4
Pin Number
31
SH8
Pin Number
52
VCP
Pin Number
37
GH3
Pin Number
28
AREF
Pin Number
10
SP2
Pin Number
17
SH7
Pin Number
49
GH2
Pin Number
22
GL6
Pin Number
46
SO2
Pin Number
13
SO1
Pin Number
12
IN2
Pin Number
5

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    DRV8718SQRVJRQ1-thumb.png

    DRV8718SQRVJRQ1-thumb.png

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    DRV8718SQRVJRQ1

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    DRV8718SQRVJRQ1

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    DRV8718SQRVJRQ1

    DRV8718SQRVJRQ1

    RVJ0056A.stp3D Model

    DRV8718SQRVJRQ1

    DRV8718SQRVJRQ1 thumbnail
    Automotive 8-Channel Smart Half-Bridge Gate Driver – 8-channel smart half-bridge gate driver for controlling external N-channel MOSFETs in automotive body electronics, motor control, solenoids, relays, LED lighting, and power distribution systems. Operates from a 4.9 V to 37 V supply (40 V absolute maximum) and supports independent half-bridge, PWM, and SPI control modes. Features integrated inline current-sense amplifiers, programmable smart gate drive, charge pump, slew-rate control, dead-time insertion, open-load detection, short-to-battery/ground diagnostics, overcurrent protection, overvoltage protection, shoot-through prevention, thermal warning/shutdown, and comprehensive fault reporting via SPI. Qualified to AEC-Q100 Grade 1, specified for operation over a −40°C to +125°C ambient temperature range, and housed in a 56-pin VQFN (8 × 8 mm) wettable-flank package.

    Properties

    DRV8718SQRVJRQ1

    Texas Instruments

    Integrated Circuit

    U

    parametric-v1

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