ESP32 Indoor Air Quality Module
Goal
HARD RULES FROM ESP32-C5-WROOM-1-N8R4 MODULE
Final GPIO Plan (LOCK THIS) USB (Native)
Component Selection (Final)
Schematic Wiring (MUST FOLLOW) USB-C
PCB Layout Requirements (55×45mm, 2-Layer)
Test Points (Silkscreen Labels)
Pre-Production Checks and Exports
Design and implement a 55×45 mm, 2-layer USB-C ESP32-C5 IAQ monitor featuring:
- STCC4 + SHT41 (SHT41 on STCC4 compensation bus SDA_C/SCL_C)
- PMS7003 UART PM sensor (via 1×6 header)
- SSD1306 OLED (I²C via 1×4 header)
- 3.3V Common-Anode RGB status LED (ASMB-MTB1-0B3A2)
- AP2112K-3.3 LDO, polyfuse, USB ESD protection
- Labeled test points and programming pads Deliver: schematic PDF, BOM CSV, Gerbers, drill, pick-and-place, and review notes.
HARD RULES FROM ESP32-C5-WROOM-1-N8R4 MODULE
- Native USB pins are fixed:
- USB D− = GPIO13
- USB D+ = GPIO14
- Do NOT consume strapping pins for peripherals (keep “clean” for reliable boot):
- GPIO26, GPIO27, GPIO28 (boot mode)
- GPIO25 and MTDI (SDIO edge)
- GPIO7 (JTAG source select)
- IO15 is NOT usable on this PSRAM module (it is SPICS1). Do not assign anything to IO15.
- Regular I²C pins can be assigned to any GPIOs via the GPIO matrix, but we will lock clean pins.
Final GPIO Plan (LOCK THIS) USB (Native)
- GPIO13 = USB_DN (D−)
- GPIO14 = USB_DP (D+)
- GPIO4 = I2C_SDA
- GPIO5 = I2C_SCL
- Add 4.7k pull-ups from SDA and SCL to 3V3.
- GPIO23 = UART_RX (ESP RX ← PMS TXD)
- GPIO24 = UART_TX (ESP TX → PMS RXD)
- GPIO8 = PMS_SET (sleep / wake control) [optional but recommended]
- GPIO6 = LED_R (PWM sink)
- GPIO9 = LED_G (PWM sink)
- GPIO10 = LED_B (PWM sink)
- GPIO0 = USER_BTN (active-low to GND, 10k pull-up to 3V3)
- EN pin: 10k pull-up to 3V3 + 1µF to GND (RC delay), plus RESET button EN→GND
- Optional BOOT button: GPIO28 → GND ONLY (do not use GPIO28 for anything else)
- Expose UART0 pads:
- GPIO11 = U0TXD (pad)
- GPIO12 = U0RXD (pad)
- Also expose: EN, GPIO28, 3V3, GND.
Component Selection (Final)
- U1: ESP32-C5-WROOM-1-N8R4
- U2: STCC4-D-R3
- U3: SHT41-AD1B-R3 (connect ONLY to STCC4 SDA_C/SCL_C)
- U4: AP2112K-3.3TRG1 (3.3V LDO)
- J1: USB-C receptacle (USB2.0)
- F1: Polyfuse (500mA is OK; 750mA optional margin)
- U5: USBLC6-2SC6 (USB ESD on D+/D−) placed near connector
- J2: PMS7003 1×6 header
- J3: OLED 1×4 header
- D1: ASMB-MTB1-0B3A2 RGB LED (common anode)
Passives:
- CC resistors: 2× 5.1kΩ (CC1→GND and CC2→GND)
- I²C pull-ups: 2× 4.7kΩ (SDA/SCL→3V3)
- USER button pull-up: 10kΩ
- EN pull-up: 10kΩ + EN cap 1µF
- RGB LED resistors (per cathode; NO resistor on common anode):
- R_R = 680Ω from LED_R cathode to GPIO6
- R_G = 220Ω from LED_G cathode to GPIO9
- R_B = 220Ω from LED_B cathode to GPIO10 Capacitors:
- LDO input: 10µF close to VIN
- LDO output: 10µF + 100nF close to VOUT
- 100nF decoupling near ESP32 3V3, STCC4 VDD/VDDIO, SHT41 VDD
- Optional 100nF near OLED header VCC
Schematic Wiring (MUST FOLLOW) USB-C
- VBUS → F1 polyfuse → +5V_USB net
- GND → GND
- D+ → USBLC6-2SC6 → GPIO14
- D− → USBLC6-2SC6 → GPIO13
- CC1 → 5.1kΩ → GND
- CC2 → 5.1kΩ → GND
- +5V_USB → AP2112K VIN
- AP2112K VOUT → +3V3 rail (ESP32, STCC4, SHT41, OLED)
- ESP32 GPIO4/5 → STCC4 SDA/SCL (main I²C) + OLED header SDA/SCL
- STCC4 SDA_C/SCL_C → SHT41 SDA/SCL (dedicated compensation bus ONLY)
- VCC = +5V_USB
- GND = GND
- SET = GPIO8 (optional 10k pull-up to 3V3 if needed)
- RXD = GPIO24 (ESP TX)
- TXD = GPIO23 (ESP RX)
- GND = GND
- LED common anode pin → +3V3
- Each cathode → series resistor → assigned GPIO (GPIO6/9/10) sinking current with PWM
PCB Layout Requirements (55×45mm, 2-Layer)
- Bottom layer: solid GND plane as continuous as possible.
- USB-C on board edge. Place USBLC6-2SC6 close to USB connector.
- Place polyfuse and LDO near USB-C; provide copper pour around LDO for heat spreading.
- Place ESP32-C5 centrally with strict antenna keep-out:
- No copper, no traces, no components under antenna zone on BOTH layers.
- Place STCC4 + SHT41 near board edge for airflow; keep away from LDO/ESP32 heat.
- Place OLED header on an edge; PMS header on an edge.
- Place RGB LED on top side where visible.
- Add accessible labeled test points.
Test Points (Silkscreen Labels)
- TP1: +5V_USB
- TP2: +3V3
- TP3: GND
- TP4: I2C_SDA (GPIO4)
- TP5: I2C_SCL (GPIO5)
- TP6: PMS_UART_RX (GPIO23)
- TP7: EN
- TP8: GPIO28 (BOOT)
Pre-Production Checks and Exports
- Run ERC/DRC and fix all issues.
- Confirm NO peripherals on strapping pins (GPIO25/26/27/28, GPIO7, MTDI/MTMS).
- Confirm IO15 unused.
- Confirm USB D+/D− routing short and symmetric.
- Export:
- Schematic PDF
- BOM CSV with MPNs
- Gerbers + drill
- Pick-and-place
- Review notes: thermals, antenna keep-out, ESD placement, strap-pin safety, connector orientation.
- Correct nets/pins, production files exported, layout meets antenna keep-out and 55×45mm size, and review notes indicate readiness to fab.
View 1 Knowledge Suggestion
26 days
1:22
General
Chat History
Project
Plan
Planning PCB Development.
Your goal is to implement the exact 55×45 mm, 2‑layer ESP32‑C5 IAQ monitor with USB‑C, OLED, PMS7003, STCC4+SHT41, and a common‑anode RGB LED, then export all files.
-
Plan to execute:
- Add all parts/passives and programming pads; lock USB D−=GPIO13, D+=GPIO14; avoid strap pins; IO15 unused.
- Wire schematic exactly per your netlist (I2C pulls, STCC4↔SHT41 bus, PMS UART on GPIO23/24, RGB LED resistors to GPIO6/9/10, EN RC, CC 5.1k, ESD).
- PCB layout: 55×45 mm, strict antenna keep‑out both layers; power block by USB‑C; sensors at edge and ≥10–15 mm from LDO/MCU; solid bottom GND; labeled test pads.
- Reviews & exports: ERC/DRC, availability; verify strap rules; export schematic PDF, BOM CSV, Gerbers+drill, P&P; compile review notes.
-
Note: Based on Flux knowledge base guidance, I will include programming pads (U0TXD GPIO11, U0RXD GPIO12, EN, GPIO28, 3V3, GND) for reliable post‑assembly flashing.
Click Start on the plan bar to begin execution.
Start with symbols and footprints
Lock in the USB-C and protection
Clarify PMS7003 header pin order
Help with EN/BOOT circuitry details
Ask about routing constraints
26 days
Ready to start.
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- Wirelessly connects nets on schematic. Used to organize schematics and separate functional blocks. To wirelessly connect net portals, give them same designator. #portaljharwinbarrozo43.0M
- Wirelessly connects power nets on schematic. Identical to the net portal, but with a power symbol. Used to organize schematics and separate functional blocks. To wirelessly connect power net portals, give them the same designator. #portal #powerjharwinbarrozo11.4M
- A generic fixed resistor for rapid developing circuit topology. Save precious design time by seamlessly add more information to this part (value, footprint, etc.) as it becomes available. Standard resistor values: 1.0Ω 10Ω 100Ω 1.0kΩ 10kΩ 100kΩ 1.0MΩ 1.1Ω 11Ω 110Ω 1.1kΩ 11kΩ 110kΩ 1.1MΩ 1.2Ω 12Ω 120Ω 1.2kΩ 12kΩ 120kΩ 1.2MΩ 1.3Ω 13Ω 130Ω 1.3kΩ 13kΩ 130kΩ 1.3MΩ 1.5Ω 15Ω 150Ω 1.5kΩ 15kΩ 150kΩ 1.5MΩ 1.6Ω 16Ω 160Ω 1.6kΩ 16kΩ 160kΩ 1.6MΩ 1.8Ω 18Ω 180Ω 1.8KΩ 18kΩ 180kΩ 1.8MΩ 2.0Ω 20Ω 200Ω 2.0kΩ 20kΩ 200kΩ 2.0MΩ 2.2Ω 22Ω 220Ω 2.2kΩ 22kΩ 220kΩ 2.2MΩ 2.4Ω 24Ω 240Ω 2.4kΩ 24kΩ 240kΩ 2.4MΩ 2.7Ω 27Ω 270Ω 2.7kΩ 27kΩ 270kΩ 2.7MΩ 3.0Ω 30Ω 300Ω 3.0KΩ 30KΩ 300KΩ 3.0MΩ 3.3Ω 33Ω 330Ω 3.3kΩ 33kΩ 330kΩ 3.3MΩ 3.6Ω 36Ω 360Ω 3.6kΩ 36kΩ 360kΩ 3.6MΩ 3.9Ω 39Ω 390Ω 3.9kΩ 39kΩ 390kΩ 3.9MΩ 4.3Ω 43Ω 430Ω 4.3kΩ 43KΩ 430KΩ 4.3MΩ 4.7Ω 47Ω 470Ω 4.7kΩ 47kΩ 470kΩ 4.7MΩ 5.1Ω 51Ω 510Ω 5.1kΩ 51kΩ 510kΩ 5.1MΩ 5.6Ω 56Ω 560Ω 5.6kΩ 56kΩ 560kΩ 5.6MΩ 6.2Ω 62Ω 620Ω 6.2kΩ 62KΩ 620KΩ 6.2MΩ 6.8Ω 68Ω 680Ω 6.8kΩ 68kΩ 680kΩ 6.8MΩ 7.5Ω 75Ω 750Ω 7.5kΩ 75kΩ 750kΩ 7.5MΩ 8.2Ω 82Ω 820Ω 8.2kΩ 82kΩ 820kΩ 8.2MΩ 9.1Ω 91Ω 910Ω 9.1kΩ 91kΩ 910kΩ 9.1MΩ #generics #CommonPartsLibraryjharwinbarrozo1.5M
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