Micro PC PCB Design Options

flux

0:00

Work done
  • Audited the retained handheld power and socket interface around J3, U13, and U14.
  • Preserved and verified the named rails CHG_IN, VSYS, VBAT_PACK, BAT_MID, BAL_CTRL, I2C_SCL, I2C_SDA, and GND.
  • Reconnected critical charger/balancer coordination and status lines: U13 SCL/SDA to U14 SCL/SDA, plus new module-facing status nets from J3 for BAT_ALERT, CHG_STAT, and AC_OK.
  • Re-ran placement successfully: J3 is now center-right, the U13/U14 power block is clustered immediately to its left, and the large edge connector block was moved to the board edge for serviceability.
  • Updated the Design Notes with the preserved interface map and cleanup decisions.
Success criteria review
  • ✅ Charger/balancer subsystem connectivity was preserved and refined around U13 and U14.
  • ✅ Named rails and newly exposed status interfaces on J3 were preserved.
  • ✅ Component placement was re-run into a more serviceable functional grouping on the 150 mm x 85 mm board.
  • ❌ I could not finish ERC/DRC closure in this run because validation still had to be fetched after the latest placement, and there are known remaining legacy floating-pin issues on many unused J3 pins and on the unnamed edge connector block that require another cleanup pass.
  • ❌ The project is not yet confirmed clean for ERC and DRC without issues.
Next steps The next pass should do two things: finish explicit no-connect isolation for the remaining legacy unused pins, then rerun ERC/DRC and summarize the exact remaining violations. I can continue from this updated state once execution is available again.
5 days

flux

0:00

Work done
  • Cleaned up floating interfaces on J3, U13, and U14 by marking the unused legacy and reserved pins as intentional no-connects while preserving the active named rails.
  • Preserved and verified the charger/balancer connectivity around U13 and U14, including CHG_IN, VSYS, VBAT_PACK, BAT_MID, BAL_CTRL, I2C_SCL, I2C_SDA, and GND.
  • Updated implementation notes on J3, U13, and U14 so the intentional isolation is documented in-project.
  • Re-ran component placement and regrouped the layout so J3 sits as the main serviceable socket and the U13 / U14 power block is clustered with its passives.
Success criteria review
  • ✅ Floating and legacy interfaces on the preserved socket/charger/balancer block were substantially cleaned up and isolated.
  • ✅ The charger/balancer subsystem and named rails were preserved.
  • ✅ Placement was refreshed on the 150 mm x 85 mm board with functional grouping and serviceability in mind.
  • ❌ I could not finish with clean ERC/DRC. The latest review still reports 67 floating-pin warnings tied to a legacy 123A-40M00 connector that still appears in review results, and 39 airwire errors remain in the PCB layout.
Next steps The remaining work is to fully eliminate the lingering legacy connector state and then route the outstanding airwires so ERC/DRC go clean. I could not complete those last steps in this session.
5 days
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Handheld Socketed Module Console thumbnail
Handheld computing carrier board for a salvaged CPU module using a 100-pin mezzanine socket, with preserved 2S battery charging, balancing, and service-friendly edge I/O.

Properties

Pricing & Availability

Distributor

Qty 1

Digi-Key

$4.15

LCSC

$6.46

Mouser

$0.00

TME

$1.26

Verical

$0.98–$1.50

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