Linear Issues Review

flux

Done. I focused the local reroute-prep rules on the hotspot cluster using the direct layout/review workflow: inspect with real-time project tools first, then apply targeted layout-rule changes rather than broad guesses
Updated local rules

Table

AreaChange
J2keep out / min keep out -> 0.15 mm, local trace width -> 0.15 mm, local via size -> 0.45 mm, via hole -> 0.20 mm
U5keep out / min keep out -> 0.15 mm, local trace width -> 0.20 mm, local via size -> 0.45 mm, via hole -> 0.20 mm
KEY1keep out / min keep out -> 0.15 mm, local trace width -> 0.15 mm
KEY2keep out / min keep out -> 0.15 mm, local trace width -> 0.15 mm
KEY3keep out / min keep out -> 0.15 mm, local trace width -> 0.15 mm
KEY4keep out / min keep out -> 0.15 mm, local trace width -> 0.15 mm
KEY5keep out / min keep out -> 0.15 mm, local trace width -> 0.15 mm
Left unchanged Current review state
The hotspot prep is in place, but the board is still blocked mainly by existing unrouted/conflicting copper:
  • 96 airwires
  • 9 overlapping copper
  • 0 floating copper in the latest check
What this means
  • J2 now has friendlier local escape-routing rules for the 0.5 mm FFC area.
  • U5 keeps a slightly wider local trace rule than the buttons.
  • The button cluster KEY1 to KEY5 is now loosened consistently for future rerouting.
If you want, I can next:
  • review the exact nets around J2 and U5 that should get priority first
  • or tighten the backlight-related area around U5 separately from the button signals
Review priority nets
Separate U5 backlight
Check overlap hotspots

Updated 22 layout rules

0:02

Set J2's minKeepOut to "0.15mm"

Set J2's keepOut to "0.15mm"

Set J2's traceWidth to "0.15mm"

Set J2's size to "0.45mm"

Set J2's holeSize to "0.20mm"

Set U5's minKeepOut to "0.15mm"

Set U5's keepOut to "0.15mm"

Set U5's traceWidth to "0.20mm"

Set U5's size to "0.45mm"

Set U5's holeSize to "0.20mm"

Set KEY1's minKeepOut to "0.15mm"

Set KEY1's keepOut to "0.15mm"

Set KEY1's traceWidth to "0.15mm"

Set KEY5's minKeepOut to "0.15mm"

Set KEY5's keepOut to "0.15mm"

Set KEY5's traceWidth to "0.15mm"

Set KEY3's minKeepOut to "0.15mm"

Set KEY3's keepOut to "0.15mm"

Set KEY3's traceWidth to "0.15mm"

Set KEY4's minKeepOut to "0.15mm"

Set KEY4's keepOut to "0.15mm"

Set KEY4's traceWidth to "0.15mm"

Updated 3 layout rules

0:04

Set KEY2's minKeepOut to "0.15mm"

Set KEY2's keepOut to "0.15mm"

Set KEY2's traceWidth to "0.15mm"

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J4
J4 P6 - C11 P2
U3 RTS - R8 P1
U1 IO12 - J4 P3
U3 D- - J1 DN1
U4 LRCK - U1 IO21
J1 VBUS__1 - U2 VIN
U4 OUTL - R10 P1
U4 OUTR - R11 P1
U3 TXD - U1 RXD0
U4 CAPM - C21 P2
C19 P2 - L1 P2
J4 P6 - C11 P2
U4 CAPP - C21 P1
U4 DIN - U1 IO47
U1 IO11 - J4 P5
J4 P6 - C11 P2
C19 P2 - L1 P2
U1 IO13 - J4 P7
J4 P6 - C11 P2
U3 D+ - J1 DP1
U3 RXD - U1 TXD0
U1 IO18 - U4 BCK
U3 DTR - R9 P1
C19 P2 - L1 P2
J4 P6 - C11 P2
U4 VNEG - C22 P1
U1 IO10 - J4 P2
J4 P6 - C11 P2
U4 LDOO - C23 P1
J1 VBUS__1 - U2 VIN
U3 GND - U4 AGND
U3 GND - U4 AGND
U3 GND - U4 AGND
J4 GND 9 - J4 GND 10
U4 FLT - U4 DEMP
U4 FLT - U4 DEMP
U1 GND_11 - U2 GND
R10 P2 - U4 FMT
J4 GND 9 - J4 GND 10
J4 P6 - C11 P2
U3 GND - U4 AGND
U4 FLT - U4 DEMP
U4
ESP32-S3 Touch Display Dev Board thumbnail
ESP32-S3 touch display development board standardized on a portrait ILI9341 TFT by default, preserving USB-C power, CP2102N USB-UART, I2C touch, PCM5102A audio, microSD, and expansion while assigning KEY1-KEY5 to BOOT, RESET, USER1, USER2, and USER3. The next design pass is driven by a portrait-oriented board resize and user-facing edge placement of the display area, touch interface, controls, and primary connector access.

Properties

V
V

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Digi-Key

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TME

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Verical

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