COM-HPC Carrier Layout
Thought for 15 sec
I’ll update Version 5.0 front-view visuals only so the Compute Module is drawn with correct 90 mm × 100 mm proportions and occupies the appropriate larger area. Version 4.0 stays locked.
Worked for 3 mins 46 sec
Thought for 26 sec
Created image.
You can move the component labels off to the side of the PCB
Worked for 4 mins 54 sec
Redone for Tiny Tim Version 5.0 front view.
Changes applied:
- Compute Module is shown much larger with intended 90 mm × 100 mm proportions.
- Carrier board remains 105 mm × 115 mm.
- Labels moved off the PCB as side callouts to reduce clutter.
- Version 4.0 remains locked and unchanged.
Updated file:
Updated Front View
Image
Redo rear and review
Lock Version 5.0
Compare front views
Check label accuracy
Improve compute module fit
Refine this doc
Ask about this doc
Tiny Tim Version 4.0 Locked Export Package
Lock Status
Tiny Tim Version 4.0 is locked as a documentation/schematic-concept milestone.
No connector, geometry, label, quantity, schematic wiring, visual, placement, or documentation change should be made after this lock unless the user explicitly requests a Version 4.1 or unlocks Version 4.0.
Export Readiness Classification
This is not a manufacturing-ready PCB export.
Reason:
- The exact COM-HPC Mini connector Samtec ASP-230336-03 is not yet available as a usable Flux part.
- Several selected exact connector footprints still require import/create.
- PCB layout is not placed/routed as a real manufacturable design.
- ERC/DRC has expected unresolved warnings/errors from incomplete pin mapping and airwires.
This package is prepared for external design review, requirements export, sourcing review, and continuation planning, not fabrication.
Locked Version 4.0 Project State
Table
| Item | State |
|---|---|
| Physical connector components in live schematic/BOM | 24 |
| Unique physical BOM parts | 11 |
| Schematic nets | 34 |
| PCB layout status | Concept/auto-layout state exists; not manufacturing-ready |
| Board concept target | 105 mm x 115 mm |
| Primary power input | AMASS XT60PW-M, J_12VIN1, nets 12V_IN and PGND |
| COM-HPC Mini carrier connector selection | Samtec ASP-230336-03, 10 mm stack height, blocked pending importable EDA library |
| PoE | Stopped / do not implement |
Locked Version 4.0 File Set
Table
| File | Purpose |
|---|---|
| Project Specification | Master requirements/specification and current design state. |
| Tiny Tim Version 4.0 | Version 4.0 concept checkpoint. |
| Current State Visuals: Tiny Tim Version 4.0 | Locked Version 4.0 visual references. |
| Tiny Tim Vertical Connectors v2.0 | Active connector table and selected connector candidates. |
| Tiny Tim Version 4.0 Implementation Checklist | Implementation status, next steps, and blockers. |
| Tiny Tim Version 4.0 Part Verification Results | Part-number and footprint verification log. |
| Tiny Tim Version 4.0 BOM Candidates and Connector Verification Review | BOM candidates, Flux-ready parts, missing footprint registry, and connector review. |
| Tiny Tim Version 4.0 Connector Pin Mapping | Provisional lane assumptions and connector-side USB/PCIe net mapping. |
| Tiny Tim Version 4.0 Power Budget | Preliminary power budget and non-PoE 12 V input policy. |
| COM-HPC Mini Connector Search Results | COM-HPC connector search and import blocker details. |
| Tiny Tim Version 4.0 PoE Solution — Discontinued | Historical PoE analysis, marked do-not-implement. |
| Tiny Tim Version 3.0 Size Optimization Estimate | Prior size-reduction rationale for 105 mm x 115 mm. |
Locked Version 4.0 Live BOM Snapshot
Table
| Qty | Part | MPN | Manufacturer | Designators |
|---|---|---|---|---|
| 5 | JST-GH 4-pin | BM04B-GHS-TBT(LF)(SN) | JST | J_GH4_1..J_GH4_5 |
| 3 | JST-GH 6-pin | BM06B-GHS-TBT(LF)(SN) | JST | J_GH6_1..J_GH6_3 |
| 3 | JST-GH 7-pin | BM07B-GHS-TBT(LF)(SN)(N) | JST | J_GH7_1..J_GH7_3 |
| 1 | PicoBlade fan connector | 53047-0410 | Molex | J_FAN1 |
| 1 | Rear PCIe FFC | 505110-1692 | Molex | J_PCIE_FFC1 |
| 1 | XT30 BAT OUT | XT30PW-M30.G.Y | AMASS | J_BAT_OUT1 |
| 1 | XT60 primary 12 V input | XT60PW-M | AMASS | J_12VIN1 |
| 3 | Vertical USB-C Gen2 | USB-C31-S-VT-CS4-BK-PP-T/R | Adam Tech | J_USBC1..J_USBC3 |
| 1 | M.2 E-key | 2199230-4 | TE Connectivity | J_M2E1 |
| 1 | M.2 M-key | MDT420M01501 | Amphenol | J_M2M1 |
| 4 | FAKRA GMSL candidate | 7-2287906-0 | TE Connectivity | J_GMSL1..J_GMSL4 |
Missing Exact Footprints / Components Still Required
Table
| Required Part | Function | Status |
|---|---|---|
| Samtec ASP-230336-03 | COM-HPC Mini carrier plug | Blocked; needs importable EDA library package or Flux library creation. |
| Bel / TRP G55-122N-155 | 10GbE RJ45 MagJack | Needs import/create. |
| Molex 5031590600 | CLIK-Mate board-side receptacle | Needs import/create if retained. |
| Molex 0525592253 / 52559-2253 | CSI vertical FFC | Needs import/create. |
| TE 2438987-1 | USB-A vertical | Needs import/create. |
| Molex 0476591100 / 47659-1100 | HDMI vertical | Needs import/create or approve close Flux alternative. |
| Molex 2047110001 | TBT/USB4 Type-C connector candidate | Needs import/create and architecture definition. |
| XT60PW-M30.G.Y.T | BAT IN/reference footprint | Needs import/create if separate from J_12VIN1 policy. |
Final Checks at Lock
Table
| Check Area | Result |
|---|---|
| Live BOM | 11 unique physical parts / 24 instances |
| Schematic nets | 34 |
| Layout summary | 160 mm x 100 mm default/auto layout state, 4 copper layers; not the locked 105 mm x 115 mm manufacturing target |
| ERC | Expected floating-pin warnings remain; COM-HPC source connector and remaining subsystem mappings incomplete |
| DRC | Airwires present; layout is not ready for manufacturing export |
| Manufacturing export | Blocked until real board outline, placement, missing footprints, routing, and DRC closure are complete |
Required Next Version
Recommended next working version: Tiny Tim Version 4.1.
Version 4.1 should start with:
- Import/create Samtec ASP-230336-03.
- Import/create missing exact connector footprints.
- Replace conceptual/default layout with 105 mm x 115 mm board setup.
- Add COM-HPC Mini connector and map provisional nets to real pins.
- Continue pin mapping subsystem by subsystem.
- Place components and then route high-speed interfaces with controlled impedance.
Lock Status
Export Readiness Classification
Locked Version 4.0 Project State
Locked Version 4.0 File Set
Locked Version 4.0 Live BOM Snapshot
Missing Exact Footprints / Components Still Required
Final Checks at Lock
Required Next Version
