Healer+ Security toolkit -cyber-deck


For 5 assembled prototype PCBs with ENIG finish and through-hole assembly:

Table


BuilderPCB + assemblyShippingDelivered totalPer PCB
JLCPCB$72.50$10.41 standard / $27.06 UPS$82.91–$99.56$16.58–$19.91
PCBWay$261.18$5–$20$266.18–$281.18$53.24–$56.24
Estimated complete prototype cost
Allow approximately $150–$300 per finished handheld, once you include:
  • Display, batteries, keyboard and antenna hardware
  • Enclosure, captive fasteners and internal storage
  • Unavailable/substituted BOM parts
  • Wiring, final mechanical assembly and testing
This excludes engineering time, certification and production tooling.
Recommended build route
  1. JLCPCB — PCB fabrication and assembly; currently the best-value option.
  2. JLC3DP or PCBWay 3D — rugged prototype enclosure.
  3. Local/manual integration — batteries, antennas, display, keyboard, switches and enclosure assembly.
The current PCB layout is not yet manufacturing-ready, so these are budgeting quotes—not an order recommendation yet. Placement, routing, DRC, BOM availability and mechanical fit must be completed before purchasing.
okay continue with the wrap up
I’m closing the remaining manufacturing gates now: live layout audit, placement, routing, final DRC/ERC, and fabrication package if the board reaches a clean state.
Worked for 13 mins 26 sec
Thought for 12 sec
Getting a layout overview.
Thought for 11 sec
Completed design checks — found 976 issues.
Thought for 18 sec — Figuring out placement details
Awaiting 1 task
"PCB Placement Done" completed.
Placement advanced substantially: all 245 components are now inside the 160 × 100 mm board, 37 overlaps were cleared, and all three switching-regulator stages pass their required placement checks.
Remaining work
  • Resolve 3 component overlaps.
  • Repair U1’s self-intersecting antenna keepout.
  • Review the microSD edge-offset warning and three L4 pad-access advisories.
  • Generate neckdowns and protected USB-C breakout.
  • Route the PCB and run final DRC/ERC.
  • Export Gerbers, BOM, and pick-and-place files only after DRC is clean.
Execution stopped because your ACUs ran out.

Healer+ Project Summary
Rugged Modular Security Toolkit
Status: Phase 1 schematic complete and ERC-clean; PCB placement and routing pending
Intended use: Authorized hardware diagnostics, protocol analysis, device development, and security research.
Executive Summary
Healer+ is a battery-powered, modular field toolkit combining ESP32-S3 compute, wireless and optical interfaces, removable storage, protected hardware-debug buses, dual hot-swappable batteries, and a rugged handheld user interface. Development is split into a serviceable proof-of-concept followed by a smaller sealed handheld targeting IP65 or better.
Product Strategy
Phase 1 — Modular Proof of Concept
  • Validate power, interfaces, radios, storage, acoustic functions, and protected target connections.
  • Favor replaceable modules, accessible headers, test points, and serviceable construction.
  • Target one working day of mixed active use and multi-week standby with optional rails disabled.
Phase 2 — Sealed Handheld
  • Consolidate proven functions onto a compact PCB and keyboard assembly.
  • Optimize standby power, RF coexistence, antenna placement, thermal behavior, and mechanical packaging.
  • Develop a gasketed outdoor enclosure with protected controls and connectors.
Core Feature Set
  • ESP32-S3-WROOM-1-N16R8 primary processor with Wi-Fi and BLE.
  • Outdoor-readable display, red-light mode, directional controls, dedicated power/back keys, and planned thumb-QWERTY keyboard.
  • USB-C charging, programming, serial console, and supported host/device experiments.
  • Spring-loaded microSD storage plus an isolated removable-storage expansion bay.
  • 13.56 MHz NFC/RFID module, region-specific sub-GHz module, infrared transmit/receive, and independent radio power gating.
  • Protected UART, I2C, SPI, GPIO, optional SWD/JTAG, selectable target logic levels, and current-limited target power that defaults off.
  • Digital I2S microphone, differential class-D speaker output, haptic and audible feedback support.
  • Internal expansion connector, modular bay, test points, captive-fastener enclosure concept, internal tool storage, and guarded emergency battery isolation.
Power Architecture
Two protected 1S Li-ion/LiPo packs connect through independently fused bays. Each bay has a dedicated MCP73831 100 mA charger. A TPS2121 reverse-blocking power mux selects the available pack and is programmed near a 4 A protection ceiling. Battery voltages and mux state are monitored by an ADS1115 ADC and TCA9535 control expander.
  • 3.3 V simultaneous design peak: approximately 1.90 A.
  • Switched 5 V target/USB-host allowance: 500 mA peak.
  • Audio allowance from VSYS: 500 mA peak, using an 8 ohm speaker and firmware volume limiting.
  • Battery-side combined theoretical maximum: approximately 3.8 A at a depleted-cell condition.
  • Example energy inventory: two 5000 mAh, 3.7 V packs provide 37 Wh nominal, with an estimated 11–13 hours at a representative 2.5 W mixed-use load.
Firmware must prevent simultaneous maximum display, radio transmit, storage write, target power, and audio loading. The existing BQ25895 charge function remains disabled to prevent cross-charging through the muxed battery node.
Safety and Serviceability
  • Authorized testing only; radio firmware must enforce regional configuration and deliberate transmit controls.
  • User-accessible electrical interfaces require ESD protection and clearly labeled pinouts.
  • Target power is switched, current-limited, and off by default.
  • A maintained guarded DPST switch can independently inhibit both battery inputs without MCU or 3.3 V power.
  • Independent pack fuses, reverse-current blocking, charger-status monitoring, and pack-presence sensing support safe hot-swap operation.
  • Phase 2 enclosure goal is IP65 or better, with gasketed seams, protected buttons, sealed/capped connectors, corrosion-resistant hardware, and serviceable battery retention.
Schematic Status
The repaired schematic passed the exhaustive ERC subset with no open errors or warnings, including floating pins, single-pin nets, driver conflicts, power inputs, no-connects, shorts, undriven nets, wire endpoints, and annotation checks.
Implemented additions include:
  • Dual protected battery bays and hot-swap mux.
  • Independent charging and battery telemetry.
  • Guarded hardware power isolation.
  • Power-gated digital microphone and speaker amplifier.
  • Power-gated and bus-isolated removable-storage expansion.
  • Second TCA9535 I/O expander for subsystem power control and status sensing.
Firmware Direction
The safe bring-up firmware is based on Arduino-ESP32 through PlatformIO. Optional and transmit-capable subsystems remain off at boot. Firmware is responsible for sequencing switched rails, isolating the storage bus during power transitions, monitoring both packs, limiting audio and aggregate current, and enforcing safe radio behavior.
Verification and Bring-Up
Initial assembled-board validation will use a current-limited bench supply, DMM, oscilloscope, USB current meter, logic analyzer, thermal camera, known-good protected packs, and ESD-safe handling. Testing proceeds from passive resistance and short checks through individual power rails, MCU programming, switched-load validation, storage, radio/optical interfaces, acoustic functions, battery switchover, charging, thermal tests, and measured active/standby consumption.
Mechanical and PCB Direction
The planned Phase 1 board is a 160 x 100 mm four-layer PCB with standard through-vias and 1 oz copper. High-current battery components must form a compact hot-plug block with short, wide copper. RF regions require antenna keepouts and separation. The microphone must align with a protected acoustic port; the speaker amplifier must sit near its connector; and the removable bay interface must remain accessible.
A separate front-panel keyboard PCB is planned for the thumb-QWERTY matrix, with directional, power, and back controls retained as dedicated inputs.
Open Engineering Gates
  1. Complete component placement and routing; newly added footprints remain unplaced and unrouted.
  2. Run PCB DRC, current-density, return-path, signal-integrity, and thermal checks.
  3. Validate TPS2121 switchover droop, reverse-current behavior, connector/fuse temperature rise, and 3.3 V transients near 2 A.
  4. Confirm translator voltage ranges, boot-selection switch contacts, spring-eject microSD mechanics, emergency-switch orientation, and final harness pinouts.
  5. Select exact NFC and sub-GHz module variants before designing external high-gain antenna connectors and matching networks.
  6. Measure real sleep, active, transmit, write, audio, USB, and charging currents before freezing Phase 2 battery and enclosure design.
  7. Complete regulatory planning for intentional radiators and region-specific variants.
Current Conclusion
The Phase 1 electrical architecture is defined and the schematic is ERC-clean. The next critical milestone is verified PCB placement and routing, followed by prototype assembly and measured bring-up. Those results will determine the final compact sealed handheld architecture.
  • Executive Summary

  • Product Strategy

  • Phase 1 — Modular Proof of Concept

  • Phase 2 — Sealed Handheld

  • Core Feature Set

  • Power Architecture

  • Safety and Serviceability

  • Schematic Status

  • Firmware Direction

  • Verification and Bring-Up

  • Mechanical and PCB Direction

  • Open Engineering Gates

  • Current Conclusion