YesMan Schematic Design Discussion

Core parts are available in the library, including the exact ESP32-S3-WROOM-1-N8R2, MCP73871, TPS63031, ICS-43434, USB-C receptacle, USB ESD device, and SP3T slide switch. I’m adding the schematic blocks now with conservative first-draft support passives and verification notes.
Created the YesMan schematic draft in the project and renamed the project to YesMan. I added the ESP32-S3-WROOM-1-N8R2, USB-C/native USB path, LiPo charger/power-path, buck-boost supply, display FPC, ICS-43434 microphone, buttons/mode switch, independent buzzer/motor drivers, connectors, test pads, named nets, and review documentation.
Open items:
  • This is a first engineering draft, not production-ready.
  • MCP73871 configuration pins and TPS63031 component values/topology still need datasheet-level human verification.
  • Display FPC orientation and backlight driver topology must be verified against the actual WH-N133-2424THBIG26-A8 cable/module.
  • PCB layout was not started.
Suggested next steps:
  1. Review the detailed file: yesman-schematic-draft-review.
  2. Review firmware/compliance notes: yesman-firmware-and-compliance-notes.
  3. Ask me to do a second-pass datasheet cleanup for MCP73871/TPS63031/display backlight.
  4. After schematic sign-off, ask me to start PCB placement with antenna, microphone, USB, and regulator constraints.
Datasheet cleanup
Fix charger warnings
Run full review
Verify GPIO choices
Prepare for layout
J1
U1
U1 3V3 - C3 P1
U2 OUT - C8 P1
U2 PROG1 - R9 P1
J3 6 - U1 IO14
U2 IN - R5 P1
U1 IO18 - R15 P1
J1 VBUS_B - C1 P1
R18 P1 - SW3 4
SW4 ~ - U1 IO38
U2 STAT2 - U1 IO6
J5 P2 - Q3 D
U1 3V3 - C3 P1
J3 8 - Q1 D
J3 7 - U1 IO15
U3 L2 - L3 P2
J2 P1 - U2 V_{BAT}
J1 DN1 - J1 DN2
MK1 SCK - U1 IO35
U1 EN - R7 P2
J2 P1 - U2 V_{BAT}
J4 P2 - Q2 D
SW3 2 - U1 IO41
U1 EN - R7 P2
U2 STAT1/~{LBO} - U1 IO5
R13 P2 - Q2 G
U1 EN - R7 P2
J3 6 - U1 IO14
U1 IO0 - R8 P2
R3 P2 - U1 IO20
SW6 ~ - U3 VIN
SW6 ~ - U3 VIN
U1 IO16 - R11 P1
R18 P1 - SW3 4
U1 3V3 - C3 P1
U1 3V3 - C3 P1
SW4 ~ - U1 IO38
U3 L1 - L3 P1
J1 DN1 - J1 DN2
J1 VBUS_B - C1 P1
SW3 1 - U1 IO40
SW5 ~ - U1 IO39
SW3 2 - U1 IO41
SW3 1 - U1 IO40
J1 CC1 - R1 P1
J1 DN1 - J1 DN2
U2 OUT - C8 P1
SW3 3 - U1 IO42
U2 PROG2 - R10 P1
R5 P2 - R6 P1
J3 4 - U1 IO11
J1 VBUS_B - C1 P1
U1 3V3 - C3 P1
U1 3V3 - C3 P1
J5 P2 - Q3 D
U1 IO17 - R13 P1
J3 7 - U1 IO15
SW5 ~ - U1 IO39
J1 DP2 - D1 D+
J1 VBUS_B - C1 P1
R15 P2 - Q3 G
U1 TXD0 - TP7 P1
R4 P2 - U1 IO19
U1 IO0 - R8 P2
SW6 ~ - U3 VIN
U1 3V3 - C3 P1
U2 PROG2 - R10 P1
U3 L2 - L3 P2
U1 3V3 - C3 P1
SW3 1 - U1 IO40
U2 ~{PG} - U1 IO7
U1 3V3 - C3 P1
J1 DN1 - J1 DN2
U1 EN - R7 P2
SW6 ~ - U3 VIN
SW3 3 - U1 IO42
U1 IO0 - R8 P2
MK1 SD - U1 IO37
SW5 ~ - U1 IO39
U2 PROG1 - R9 P1
SW3 3 - U1 IO42
SW4 ~ - U1 IO38
J2 P1 - U2 V_{BAT}
J1 DP2 - D1 D+
SW3 2 - U1 IO41
R4 P2 - U1 IO19
U2 STAT2 - U1 IO6
U1 3V3 - C3 P1
U1 TXD0 - TP7 P1
J3 4 - U1 IO11
SW6 ~ - U3 VIN
MK1 SCK - U1 IO35
J3 5 - U1 IO13
J5 P2 - Q3 D
U1 3V3 - C3 P1
R11 P2 - Q1 G
U1 RXD0 - TP8 P1
R13 P2 - Q2 G
J1 CC2 - R2 P1
U1 3V3 - C3 P1
R5 P2 - R6 P1
J3 5 - U1 IO13
R13 P2 - Q2 G
U2 IN - R5 P1
U1 IO18 - R15 P1
J1 DP2 - D1 D+
R15 P2 - Q3 G
R11 P2 - Q1 G
MK1 SD - U1 IO37
J1 DN1 - J1 DN2
U1 IO16 - R11 P1
U3 L1 - L3 P1
U1 3V3 - C3 P1
J5 P2 - Q3 D
J3 3 - U1 IO12
U1 3V3 - C3 P1
U1 3V3 - C3 P1
U1 3V3 - C3 P1
R11 P2 - Q1 G
MK1 WS - U1 IO36
J1 VBUS_B - C1 P1
U2 OUT - C8 P1
SW6 ~ - U3 VIN
J4 P2 - Q2 D
R3 P2 - U1 IO20
U1 3V3 - C3 P1
U2 STAT1/~{LBO} - U1 IO5
J3 3 - U1 IO12
U2 ~{PG} - U1 IO7
J2 P1 - U2 V_{BAT}
U1 RXD0 - TP8 P1
U1 IO17 - R13 P1
J1 CC1 - R1 P1
J3 8 - Q1 D
SW4 ~ - U1 IO38
R15 P2 - Q3 G
SW5 ~ - U1 IO39
J1 CC2 - R2 P1
J1 DP2 - D1 D+
R5 P2 - R6 P1
U1 3V3 - C3 P1
U1 IO0 - R8 P2
U1 EN - R7 P2
U1 3V3 - C3 P1
MK1 WS - U1 IO36
U1 3V3 - C3 P1
Q3 S - R16 P2
U2 V_{SS} - C6 P2
U1 GND - C3 P2
U2 V_{SS} - C6 P2
J3 SHIELD - C12 P2
U2 V_{SS} - C6 P2
GND
J1 SHIELD - R1 P2
J1 SHIELD - R1 P2
U2 V_{SS} - C6 P2
MK1 GND - MK1 LR
J3 SHIELD - C12 P2
J2 P2 - U2 V_{SS}
J2 P2 - U2 V_{SS}
U2 V_{SS} - C6 P2
MK1 GND - MK1 LR
U1 GND - C3 P2
U1 GND - C3 P2
Q3 S - R16 P2
GND
J1 SHIELD - J1 SHIELD
R19 P2 - R20 P2
U1 GND - C3 P2
R9 P2 - R10 P2
MK1 GND - MK1 LR
U2 V_{SS} - C6 P2
U2 V_{SS} - C6 P2
GND
J1 SHIELD - R1 P2
U1 GND - C3 P2
R19 P2 - R20 P2
U2 V_{SS} - C6 P2
J3 SHIELD - C12 P2
U1 GND - C3 P2
U1 GND - C3 P2
J1 SHIELD - J1 SHIELD
R19 P2 - R20 P2
J1 SHIELD - R1 P2
J1 SHIELD - R1 P2
J1 SHIELD - R1 P2
MK1 GND - MK1 LR
U1 GND - C3 P2
U2 V_{SS} - C6 P2
R19 P2 - R20 P2
R19 P2 - R20 P2
J1 SHIELD - R1 P2
GND
MK1 GND - MK1 LR
MK1 GND - MK1 LR
J3 SHIELD - C12 P2
R9 P2 - R10 P2
U2 V_{SS} - C6 P2
MK1 GND - MK1 LR
U1 GND - C3 P2
C9
Capacitance
10uF
R13
Resistance
100Ω
R21
Resistance
100kΩ
C12
Capacitance
0.1uF
R6
Resistance
100kΩ
C5
Capacitance
0.1uF
C3
Capacitance
10uF
R2
Resistance
5.1kΩ
R11
Resistance
100Ω
R17
Resistance
10kΩ
C11
Capacitance
22uF
C2
Capacitance
0.1uF
C1
Capacitance
10uF
R14
Resistance
100kΩ
R18
Resistance
10kΩ
R10
Resistance
10kΩ
C16
Capacitance
0.1uF
C7
Capacitance
4.7uF
R9
Resistance
2.0kΩ
C14
Capacitance
0.1uF
C4
Capacitance
0.1uF
R1
Resistance
5.1kΩ
C8
Capacitance
10uF
C6
Capacitance
4.7uF
C10
Capacitance
0.1uF
R19
Resistance
100kΩ
R20
Resistance
100kΩ
R4
Resistance
22Ω
C15
Capacitance
0.1uF
R7
Resistance
10kΩ
R3
Resistance
22Ω
R15
Resistance
100Ω
R12
Resistance
100kΩ
R16
Resistance
100kΩ
R5
Resistance
100kΩ
R8
Resistance
10kΩ
C13
Capacitance
0.1uF
TP7
SW6
TP5
Q3
TP4
Q2
TP1
TP8
TP3
TP2
TP6
Q1
J4
L3
Inductance
2.2µH
SW2
J5
D2
SW3
SW1
U2
MK1
SW5
J2
SW4
J3
D1
U3

Refine this doc
Ask about this doc
YesMan Schematic Draft Review
Status: first engineering schematic draft only. Not production-ready. PCB layout has not been started.
Functional Blocks Created
  1. USB-C and USB Protection
  2. Battery Charger and Power Path
  3. 3.3 V Buck-Boost Supply
  4. ESP32-S3 Controller
  5. ST7789 Display
  6. ICS-43434 Microphone
  7. User Buttons and Mode Switch
  8. Buzzer and Vibration Drivers
  9. Connectors and Test Points
GPIO Allocation Table

Table


FunctionNetESP32-S3 pinNotes
Native USB D-USB_D-IO19Reserved for USB only
Native USB D+USB_D+IO20Reserved for USB only
USB VBUS senseUSB_VBUS_SENSEIO4100k/100k divider from USB_VBUS
Charger STAT1/LBOCHG_STAT1IO5Verify active polarity in firmware
Charger STAT2CHG_STAT2IO6Verify active polarity in firmware
USB power-goodUSB_POWER_GOODIO7From MCP73871 PG output
TFT MOSITFT_MOSIIO11SPI data
TFT SCLKTFT_SCLKIO12SPI clock
TFT resetTFT_RSTIO13Active-low reset
TFT D/CTFT_DCIO14Data/command
TFT CSTFT_CSIO15Active-low chip select
TFT backlight PWMTFT_BLIO16Drives MOSFET gate via resistor
Buzzer PWMBUZZER_PWMIO17Drives independent MOSFET gate
Motor driveMOTOR_DRIVEIO18Drives independent MOSFET gate
I2S BCLKMIC_BCLKIO35Digital microphone clock
I2S WS/LRCLKMIC_WSIO36Digital microphone word select
I2S dataMIC_DATAIO37Digital microphone data
Confirm buttonYES_CONFIRMIO38Pull-up + optional debounce capacitor
Config/Bluetooth buttonCFG_BTIO39Pull-up + optional debounce capacitor
Mode silent detectMODE_SILENTIO40External pull-down
Mode vibration detectMODE_VIBRATIONIO41External pull-down
Mode buzzer detectMODE_BUZZERIO42External pull-down
Boot strapGPIO0_BOOTIO0Pull-up + BOOT button
UART RX test padUART_RXRXD0Test pad only
UART TX test padUART_TXTXD0Test pad only
Native USB pins are not assigned to other peripherals. GPIO0 is only used for boot strapping. Avoid using IO45/IO46 strapping pins and internally reserved module pins unless reviewed against the Espressif datasheet.
Important Notes Placed in Component Properties / Design Intent
  • ESP32-S3-WROOM-1-N8R2 PCB antenna module selected; antenna keep-out must follow Espressif land-pattern guidance during PCB layout.
  • USB-C shield is tied to GND in this draft; final EMI strategy should be verified for enclosure/cable ESD performance.
  • Battery is assumed protected; production LiPo must include protection PCB for overcharge, over-discharge, and over-current.
  • Display FPC logical pinout follows the requested WH-N133-2424THBIG26-A8 assignment; exact contact orientation and footprint must be verified before layout.
  • ICS-43434 is a bottom-port microphone; PCB must include acoustic hole and no copper/vias/solder-mask obstruction or noisy switching parts near the port.
  • Microphone should be physically separated from buzzer, vibration motor, and switching regulator.
Items Requiring Human Verification
  1. MCP73871 exact variant and all configuration pins: CE, TE, SEL, PROG1/PROG2, THERM, STAT/PG polarity, and thermal derating must be checked against the selected datasheet/package before production.
  2. TPS63031 inductor saturation current, input/output capacitor ESR/derating, and EN/power-switch topology must be checked against the exact TI datasheet and expected ESP32-S3 peak current.
  3. Display backlight pin behavior for WH-N133-2424THBIG26-A8 must be confirmed: the draft prevents direct GPIO drive, but the final high-side/low-side driver topology depends on the module’s LED wiring.
  4. FH12-8S-1SH(55) is a placeholder 8-position FPC connector; pitch/contact side/cable orientation must be verified against the physical display tail.
  5. USB4215-03-A USB-C receptacle footprint, shell pins, shield grounding/ESD strategy, and D+/D- pin mapping must be verified before PCB layout.
  6. ESP32-S3 GPIO allocation must be checked against the Espressif datasheet for strapping pins, boot behavior, and any module-reserved constraints.
  7. USB Audio Class + CDC/HID composite operation is a firmware requirement; Windows driverless recognition depends on descriptor firmware.
  8. Battery connector polarity must match the production battery cable; silkscreen polarity is required.
  9. Buzzer and vibration motor connector polarity/current ratings must be verified against chosen external parts.
  10. The SP3T switch footprint/contact truth table must be verified so the three physical positions map to silent, vibration, and buzzer as intended.
  11. All generic passives need final MPNs, voltage/current ratings, tolerance, and assembly availability before release.
  12. No PCB has been created; antenna keep-out, microphone acoustic opening, regulator loop area, USB differential routing, and thermal performance remain layout tasks.
First Bring-Up Outline
  1. Inspect battery polarity and USB-C connector soldering before applying power.
  2. Power from USB only; confirm USB_VBUS and charger status pins.
  3. With system switch OFF, verify battery charging continues and SYS_3V3 is disabled.
  4. Switch system ON; verify SYSTEM_RAW and SYS_3V3 ramp to valid levels.
  5. Enter ESP32 boot mode using BOOT + RESET/EN and verify native USB download/debug.
  6. Enumerate USB CDC/HID first, then USB Audio Class microphone after firmware descriptor validation.
  7. Test display SPI and backlight PWM at limited duty cycle.
  8. Test microphone I2S capture away from buzzer/motor excitation.
  9. Test YES_CONFIRM, CFG_BT, SP3T mode switch truth table.
  10. Test buzzer and motor drivers independently with current-limited supply.
  • Functional Blocks Created

  • GPIO Allocation Table

  • Important Notes Placed in Component Properties / Design Intent

  • Items Requiring Human Verification

  • First Bring-Up Outline

YesMan

YesMan thumbnail
Portable ESP32-S3 smart hardware companion with USB Audio microphone, display, alerts, and LiPo power

Properties

Properties describe core aspects of the project.

Pricing & Availability

Distributor

Qty 1

Arrow

$4.38–$6.09

Digi-Key

$6.33–$6.48

HQonline

$5.88–$6.03

LCSC

$19.01–$19.18

Mouser

$18.54

TME

$1.68

Verical

$7.74–$33.75

Controls