Part Metadata Audit and Verification


I’ll audit the OV2640 part metadata, find or verify the official datasheet URL, then compare the symbol pins, footprint/pad count, and pin descriptions against the datasheet. I’ll put the detailed findings in a project file and keep the final summary concise.
Completed the part audit and created OV2640 Camera Board Part Audit.
Key result: the Datasheet URL was already present, the footprint has the correct 18 through-hole pad count, but the schematic symbol pin numbering is critically mismatched against the Waveshare 18-pin connector schematic—17 of 18 pins differ, with only GND on pin 18 matching. I also flagged naming issues: VSYNK → VSYNC, RET → RESET, and PWON → PWDN.
Fix all symbol pin numbers and names to match the Waveshare 18-pin datasheet. also convert the symbol to parametric style, and place each pin into the correct section based on the datasheet.
I’ll correct the terminal names and pin-number metadata to the Waveshare 18-pin connector order, then set parametric-symbol properties and section/group metadata so the symbol is organized by power, control, clock/sync, SCCB, and data bus.
Fixed the symbol to match the Waveshare 18-pin OV2640 Camera Board pinout.
Updated:
  • Pin names: RESET, PWDN, VSYNC, SIOC, SIOD, D2–D9, PCLK, XCLK, 3.3V, GND
  • Pin numbers: now match the Waveshare connector order exactly
  • Pin descriptions and electrical types
  • Parametric symbol metadata
  • Functional sections: Power, Ground, Control, Clock, Communication, and Data
Verification passed with no reported terminal/parametric review issues.
Run ERC/DRC
Show pin mapping
Add camera connector
Check support parts

RESET
3.3V
D9
D8
VSYNC
PCLK
SIOC
D2
D6
PWDN
HREF
D5
D4
XCLK
D7
D3
GND
SIOD
Name
Pin #
Type
Section
Pin Group
Orientation
Order
Sub-symbol
Pin Description
D9
1
Output
Data
Parallel Data Bus
Right
30
Video data bit 9
D8
2
Output
Data
Parallel Data Bus
Right
30
Video data bit 8
RESET
3
Input
Control
Reset
Left
20
Camera reset input
PWDN
4
Input
Control
Power Control
Left
20
Power-down control
D7
5
Output
Data
Parallel Data Bus
Right
30
Video data bit 7
D6
6
Output
Data
Parallel Data Bus
Right
30
Video data bit 6
PCLK
7
Output
Clock
Pixel Clock
Right
50
Pixel clock output
XCLK
8
Input
Clock
Input Clock
Left
50
External clock input
D5
9
Output
Data
Parallel Data Bus
Right
30
Video data bit 5
D4
10
Output
Data
Parallel Data Bus
Right
30
Video data bit 4
VSYNC
11
Output
Clock
Frame Sync
Right
50
Vertical sync output
HREF
12
Output
Clock
Line Sync
Right
50
Horizontal line valid
D3
13
Output
Data
Parallel Data Bus
Right
30
Video data bit 3
D2
14
Output
Data
Parallel Data Bus
Right
30
Video data bit 2
SIOC
15
Input
Communication
SCCB
Left
40
SCCB serial clock
SIOD
16
Bi-Directional
Communication
SCCB
Left
40
SCCB serial data
3.3V
17
Power In
Power
Power
Top
10
3.3 V supply input
GND
18
Ground
Ground
Ground
Bottom
60
Ground return

OV2640 Camera Board