Part Metadata Audit and Verification
VSYNK → VSYNC, RET → RESET, and PWON → PWDN.RESET, PWDN, VSYNC, SIOC, SIOD, D2–D9, PCLK, XCLK, 3.3V, GNDhttps://www.lcsc.com/datasheet/C359962.pdf?spm=wm.sxq.inf.ggs&lcsc_vid=...f9c8e53b-844f-4c52-a49a-9b2300e4e53f.https://www.waveshare.com/w/upload/9/99/OV2640-Camera-Board-Schematic.pdfhttps://www.uctronics.com/download/OV2640_DS.pdfhttps://www.ovt.com/wp-content/uploads/2021/01/OV2640-Volume-Production-FINAL.pdfTable
| Field | Value Found |
|---|---|
| Part name | OV2640 Camera Board |
| Manufacturer | Waveshare(微雪电子) |
| MPN | OV2640 Camera Board |
| LCSC Part Number | C359962 |
| JLCPCB Part Class | Extended Part |
| Part Type | Raspberry Pi |
| Designator Prefix | U |
| Package / Case Code | SENSORM-TH_L35.7-W3.9-OV2640 |
| Terminal count | 18 |
| Datasheet URL | Already present in indexed project data; no update required |
| Footprint asset | SENSORM-TH_L35.7-W3.9-OV2640.kicad_mod |
| Symbol asset | OV2640CAMERABOARD Symbol.svg |
Table
| Board Pin | Expected Net | Function |
|---|---|---|
| 1 | Y9 / D9 | Pixel data bit 9 |
| 2 | Y8 / D8 | Pixel data bit 8 |
| 3 | RESET | Camera reset |
| 4 | PWDN | Power-down control |
| 5 | Y7 / D7 | Pixel data bit 7 |
| 6 | Y6 / D6 | Pixel data bit 6 |
| 7 | PCLK | Pixel clock |
| 8 | XCLK | External input clock |
| 9 | Y5 / D5 | Pixel data bit 5 |
| 10 | Y4 / D4 | Pixel data bit 4 |
| 11 | VSYNC | Vertical sync |
| 12 | HREF | Horizontal reference / line valid |
| 13 | Y3 / D3 | Pixel data bit 3 |
| 14 | Y2 / D2 | Pixel data bit 2 |
| 15 | SIO_CLK / SIOC | SCCB/I2C serial clock |
| 16 | SIO_DAT / SIOD | SCCB/I2C serial data |
| 17 | 3.3V | Power supply |
| 18 | GND | Ground |
Table
| Current Pin Number | Current Symbol Terminal | Expected Terminal for That Pin | Status |
|---|---|---|---|
| 1 | 3.3V | D9 / Y9 | MISMATCH |
| 2 | SIOC | D8 / Y8 | MISMATCH |
| 3 | VSYNK | RESET | MISMATCH; also typo, should be VSYNC if vertical sync |
| 4 | PCLK | PWDN | MISMATCH |
| 5 | D9 | D7 / Y7 | MISMATCH |
| 6 | D7 | D6 / Y6 | MISMATCH |
| 7 | D5 | PCLK | MISMATCH |
| 8 | D3 | XCLK | MISMATCH |
| 9 | RET | D5 / Y5 | MISMATCH; name appears to be typo/truncation of RESET |
| 10 | PWON | D4 / Y4 | MISMATCH; expected PWDN not PWON |
| 11 | D2 | VSYNC | MISMATCH |
| 12 | D4 | HREF | MISMATCH |
| 13 | D6 | D3 / Y3 | MISMATCH |
| 14 | D8 | D2 / Y2 | MISMATCH |
| 15 | XCLK | SIOC / SIO_CLK | MISMATCH |
| 16 | HREF | SIOD / SIO_DAT | MISMATCH |
| 17 | SIOD | 3.3V | MISMATCH |
| 18 | GND | GND | OK |
VSYNK should be VSYNC; RET likely should be RESET; PWON likely should be PWDN.Raspberry Pi, but this is a camera module / sensor evaluation board, not a Raspberry Pi board.VSYNK → VSYNC, RET → RESET, and PWON → PWDN.Raspberry Pi to a more accurate value such as Sensor Evaluation Board or Camera Module if allowed by the part property schema.Scope
Sources Reviewed
Available Part Metadata
Key Datasheet Specs
OV2640 Camera Board / module-level data from project datasheet
OV2640 sensor-level data from OmniVision datasheet
Expected 18-Pin Camera Board Connector Pinout
Current Flux Symbol Terminal Pin Mapping
Footprint Review
Mismatches / Issues Flagged
Recommended Corrections
Verdict