ESP32 LCSC Part Verification
Worked for 3 mins 15 sec
Verification was limited because the active project data/index exposes only two properties: the Espressif ESP32-S3 datasheet URL and
Symbol Style: parametric-v1. I could not retrieve an actual symbol terminal list, footprint pad list, pad mapping, BOM entry, or project-level LCSC/MPN metadata from the project, and the automated review endpoint reported the project as unavailable.Issues found / recommended fixes:
-
Missing part metadata
- Expected LCSC part appears to be C2913192.
- Expected MPN: ESP32-S3
- Expected manufacturer: Espressif Systems / ESPRESSIF
- Expected package: QFN-56-EP(7x7)
- Add these explicitly to the part project metadata.
-
Footprint/pad mapping must be verified or added
- Datasheet package is QFN56, 7 mm × 7 mm, 56 perimeter pins plus exposed pad.
- Exposed pad must be pad 57 = GND.
- Confirm the footprint has pads 1–56 plus 57, not just 56 pads.
- Confirm EPAD dimensions match the base ESP32-S3, not the special ESP32-S3FH4R2 variant, which has a different/larger EPAD.
-
Pin mapping correction to use
- Critical datasheet mapping around pins 43–57 is:
- 43 VDDA
- 44 GPIO38
- 45 MTCK
- 46 MTDO
- 47 VDD3P3_CPU
- 48 MTDI
- 49 MTMS
- 50 U0TXD
- 51 U0RXD
- 52 GPIO45
- 53 GPIO46
- 54 XTAL_N
- 55 XTAL_P
- 56 VDDA
- 57 GND / exposed pad
- If the project symbol has GPIO38 at pin 43 or shifts MTCK/MTDO/VDD3P3_CPU one pin early, that is incorrect.
- Critical datasheet mapping around pins 43–57 is:
-
Electrical metadata to add/check
- Supply voltage recommended range: 3.0 V to 3.6 V, typical 3.3 V.
- Absolute max supply should not exceed 3.6 V.
- Mark power pins correctly:
VDD3P3,VDD3P3_RTC,VDD3P3_CPU,VDDA,VDD_SPI, and EPADGND. - Strapping pins should be documented: GPIO0, GPIO3, GPIO45, GPIO46.
GPIO45controls VDD_SPI voltage and should not be casually used without noting boot implications.
-
Documentation gaps
- Add a short part note stating this is the bare ESP32-S3 SoC, not an ESP32-S3 module.
- Add a warning that RF matching, crystal, flash/PSRAM usage, boot strapping, decoupling, and antenna/RF layout are design-critical for the bare chip.
- Add the LCSC URL/reference for C2913192.
Bottom line: the public datasheet/LCSC identity is clear, but the project appears incomplete or not fully indexed. The highest-priority fix is to add/verify the full 57-pad QFN footprint and exact datasheet pin mapping, especially pins 43–57 and exposed pad 57 = GND.
Fix metadata issues
Verify pin mapping
Check footprint pads
Use LCSC reference
Run part review
