LX750 Curve Tracer
Worked for 9 mins 34 sec
Added the RP2040 support circuitry scaffold and wiring before the session was stopped due to no available ACUs.
What was accomplished:
- Added external QSPI flash: U2 W25Q16JWSNIQ.
- Added 12 MHz crystal: Y1, with R2 1 kΩ damping resistor and C2/C3 27 pF load capacitors.
- Added reset and BOOTSEL buttons: S1 reset, S2 BOOTSEL.
- Added SWD programming header: J4 wired to SWDIO, SWCLK, RUN, 3V3, and GND.
- Added USB-C programming port: J5, USB ESD array D1, R3/R4 27 Ω USB series resistors, and R5/R6 5.1 kΩ CC pull-downs.
- Added RP2040 decoupling and rail support caps: C1–C18, including 100 nF local decoupling, 1 µF VREG caps, and 10 µF 3.3 V bulk.
- Wired key nets: +3V3, +1V1_CORE, QSPI_*, RP2040_RUN, USB_DP/DM, USB_CC1/CC2, USB_VBUS, SWDIO, and SWCLK.
Open items:
- I could not update the project notes or firmware starter file because AI execution stopped when ACUs ran out.
- Some unrelated/future-use RP2040 GPIOs remain intentionally unwired.
- The selected crystal is a library-available 12 MHz / 20 pF part, so the 27 pF load caps are provisional and should be reviewed during layout/BOM finalization.
- +3.3 V and +5 V regulator components are still provisional rails, not fully implemented power supplies.
Suggested next steps once ACUs are available:
- Run a schematic review and clean remaining ERC issues.
- Update LX750 Migration Notes and create/update the firmware starter file.
- Add the actual +3.3 V / +5 V regulator circuitry.
- Wire RP2040 SPI to the ADS8684 ADC and TFT connector.
Review and clean ERC
Add power regulators
Wire SPI buses
Check crystal caps
Update migration notes
Waiting for input
