• Bench instrument for tracing semiconductor I/V curves and related analog signal behavior.
• Prototype / learning build, not production safety-certified equipment yet.
• User-facing DUT terminals may involve elevated voltages and dissipative current ranges, so the design must treat the analog/DUT section separately from the low-voltage digital section.

• Recreate the LX750 analog stimulus and measurement functions from the original schematic.
• Provide X and Y analog measurement outputs compatible with digital acquisition.
• Digitize X/Y signals and render curves on a 4-inch SPI TFT.
• Use modern SMD op amps, comparators, power drivers, transistors, passives, and protection parts.
• Use a 5 V main input if feasible, but only by generating the required analog and high-voltage rails internally.

• LX750-inspired analog curve-tracer core.
• RP2040-based acquisition and display controller.
• 4-inch SPI TFT display interface.
• Protected analog-to-digital interface for X/Y channels.
• SMD construction.
• External power architecture to be finalized after the LX750 rails and measurement ranges are verified.

Diagram

• Preferred safe direction: accept 5 V as a main input only if current budget and internal conversion losses are acceptable.
• The original LX750 evidence points to higher analog rails and a high-voltage low-current winding, so a true 5 V-only analog design is not considered faithful without major redesign.
• Candidate rails: 3.3 V digital, 5 V auxiliary/display/backlight if needed, ±12 V or ±15 V analog, and a separate DUT/high-voltage stimulus rail if confirmed by the schematic.

• Original active parts identified from OCR: TDA2030A, TL082, UA741, LM311, LM324, CD4040, UA7815/7815, plus legacy transistors/diodes.
• Modern SMD replacements must be selected by function, not blindly pin-for-pin, after the schematic netlist and operating ranges are verified.
• Power resistors/shunts in the original list suggest selectable current ranges and nontrivial heat dissipation.

• RP2040 runs from 3.3 V.
• TFT logic should be 3.3 V-compatible or level-shifted.
• TFT backlight power must be budgeted separately from logic current.

• LX750 X/Y analog outputs must not connect directly to RP2040 ADC pins.
• Required interface: scaling/offset, input series resistance, RC filtering, clamp/protection to ADC rails, and explicit handling of negative or overrange signals.
• A dedicated 12- to 16-bit SPI ADC is preferred for cleaner curve display and better protection/accuracy.

• External: main power input, DUT terminals, USB/program/debug if selected, display connector.
• Internal: 3.3 V digital rail, analog rails, DUT stimulus rail, SPI display bus, SPI ADC bus, X/Y analog conditioned channels.
• Safety: keep high-voltage/DUT nodes physically and electrically separated from USB/RP2040/TFT user interface nodes.

• User preference: 5 V main power if possible.
• Engineering decision: 5 V input is possible only as a source feeding DC/DC converters; the LX750 analog section is not expected to run from 5 V alone.
• If full original output capability is preserved, a plain USB 5 V/500 mA source will be inadequate; USB-C 5 V at 3 A may still be marginal depending on the high-voltage and analog power demand.
• A USB-C PD 12–20 V input or external 12/24 V adapter may be safer and more efficient if original LX750 ranges are preserved.

• Modern SMD components, likely 0603/0805 passives for normal signals and larger packages for shunts/power resistors.
• Thermal design required for current ranges and driver stages.
• Creepage/clearance and isolation must be reviewed if the high-voltage rail is retained.
• Use stocked, non-EOL parts where possible.

• ADC sampling of X/Y channels synchronized well enough to draw stable curves.
• SPI TFT driver support.
• Calibration storage for X/Y offset/gain and current/voltage ranges.
• Range-selection GPIOs if analog switches or relays replace mechanical switches.
• USB serial/debug recommended for calibration and firmware update.

• Separate zones: power input/conversion, high-voltage/DUT stimulus, precision analog measurement, RP2040/display digital logic.
• Keep ADC/X/Y traces short and away from switching nodes and power driver outputs.
• DUT connectors and any high-voltage nodes need clear labeling and spacing.
• Display connector should be placed for mechanical accessibility.

• Project name and direction set to Signal Tracer.
• The design will migrate the LX750 analog circuit to SMD technology, but not until the schematic is readable enough to verify every connection.
• 5 V may be the main input, but not the only rail; internal rail generation is required for faithful LX750 behavior.
• External ADC is preferred over raw RP2040 ADC for measurement quality and robustness.

• The uploaded schematic image is the authoritative LX750 source, but OCR is not accurate enough for safe net-by-net recreation.
• The original LX750 power tree includes higher analog rails and a high-voltage low-current section based on the parts list.
• The goal is faithful behavior first, then modernization, rather than a completely new low-voltage curve tracer.

• 2026-07-27: Replaced stale USB-C sensor specification with Signal Tracer LX750 migration specification.
• 2026-07-27: Added user preference for 5 V main power and engineering constraint that generated analog/HV rails are still required.