PCB Requirements for Blood Pressure Meter

1:30

General
Chat History
Project
Action
Schematic
D1 DP - GND GND

Clarifying net portal connections.

Determining pin names.

Navigating plan mode instructions.

Following execution steps.

Using Schematic Tool.

Checking if I can make the changes for you.

Drafting the action plan.

Net Connections to be removed

Table


NetConnections
J1_1_D2_A1J1:P, D2:A1, D3:A1
Net Connections to be added

Table


NetConnections
UI1_ESDJ1:01, D2:A1
UI2_ESDJ1:02, D3:A1
VINL3:P1, D1:VBUS
VIN_SERIESL2:P1, L3:P2
VIN_FILTL2:P2, C2:P1, C3:P1
GNDC2:P2, C3:P2, D1:DP, D2:A2, D3:A2, SHLD1:Shield
MCU_3V3L1:P1
ANALOG_MEASL1:P2
42 days
apply
42 days

1:38

General
Chat History
Project
Action
D1 DP - GND GND

Planning project changes.

Clarifying action requirements.

Following tool guidelines.

Exploring direct actions.

Checking if I can make the changes for you.

Executing action commands.

Net Connections to be removed

Table


NetConnections
J1_1_D2_A1J1:P, D2:A1, D3:A1
Net Connections to be added

Table


NetConnections
UI_ESDJ1:P, D2:A1, D3:A1
42 days

Needs more info.

Show Plan


D1 VBUS - L3 P1
D1 DP - GND GND
J1 P - D3 A1
C1
Capacitance
Capacitance
D1 DP - GND GND
D1
D1 VBUS - L3 P1
J1 P - D3 A1
Net1
C2
Capacitance
10 uF
D1 DP - GND GND
D1 DP - GND GND
D2
J1 P - D3 A1
Net2
Net1
Net2
D3
C3
Capacitance
100 nF
L3
Inductance
100 uH
R1
Resistance
500 Ω
L2
Inductance
1 uH
L1
Inductance
1uH
SHLD1
GND
J1


  • Ground
    A common return path for electric current. Commonly known as ground.
  • Net Portal
    Wirelessly connects nets on schematic. Used to organize schematics and separate functional blocks. To wirelessly connect net portals, give them same designator. #portal
  • Power Net Portal
    Wirelessly connects power nets on schematic. Identical to the net portal, but with a power symbol. Used to organize schematics and separate functional blocks. To wirelessly connect power net portals, give them the same designator. #portal #power
  • Generic Resistor
    A generic fixed resistor for rapid developing circuit topology. Save precious design time by seamlessly add more information to this part (value, footprint, etc.) as it becomes available. Standard resistor values: 1.0Ω 10Ω 100Ω 1.0kΩ 10kΩ 100kΩ 1.0MΩ 1.1Ω 11Ω 110Ω 1.1kΩ 11kΩ 110kΩ 1.1MΩ 1.2Ω 12Ω 120Ω 1.2kΩ 12kΩ 120kΩ 1.2MΩ 1.3Ω 13Ω 130Ω 1.3kΩ 13kΩ 130kΩ 1.3MΩ 1.5Ω 15Ω 150Ω 1.5kΩ 15kΩ 150kΩ 1.5MΩ 1.6Ω 16Ω 160Ω 1.6kΩ 16kΩ 160kΩ 1.6MΩ 1.8Ω 18Ω 180Ω 1.8KΩ 18kΩ 180kΩ 1.8MΩ 2.0Ω 20Ω 200Ω 2.0kΩ 20kΩ 200kΩ 2.0MΩ 2.2Ω 22Ω 220Ω 2.2kΩ 22kΩ 220kΩ 2.2MΩ 2.4Ω 24Ω 240Ω 2.4kΩ 24kΩ 240kΩ 2.4MΩ 2.7Ω 27Ω 270Ω 2.7kΩ 27kΩ 270kΩ 2.7MΩ 3.0Ω 30Ω 300Ω 3.0KΩ 30KΩ 300KΩ 3.0MΩ 3.3Ω 33Ω 330Ω 3.3kΩ 33kΩ 330kΩ 3.3MΩ 3.6Ω 36Ω 360Ω 3.6kΩ 36kΩ 360kΩ 3.6MΩ 3.9Ω 39Ω 390Ω 3.9kΩ 39kΩ 390kΩ 3.9MΩ 4.3Ω 43Ω 430Ω 4.3kΩ 43KΩ 430KΩ 4.3MΩ 4.7Ω 47Ω 470Ω 4.7kΩ 47kΩ 470kΩ 4.7MΩ 5.1Ω 51Ω 510Ω 5.1kΩ 51kΩ 510kΩ 5.1MΩ 5.6Ω 56Ω 560Ω 5.6kΩ 56kΩ 560kΩ 5.6MΩ 6.2Ω 62Ω 620Ω 6.2kΩ 62KΩ 620KΩ 6.2MΩ 6.8Ω 68Ω 680Ω 6.8kΩ 68kΩ 680kΩ 6.8MΩ 7.5Ω 75Ω 750Ω 7.5kΩ 75kΩ 750kΩ 7.5MΩ 8.2Ω 82Ω 820Ω 8.2kΩ 82kΩ 820kΩ 8.2MΩ 9.1Ω 91Ω 910Ω 9.1kΩ 91kΩ 910kΩ 9.1MΩ #generics #CommonPartsLibrary
  • Generic Capacitor
    A generic fixed capacitor ideal for rapid circuit topology development. You can choose between polarized and non-polarized types, its symbol and the footprint will automatically adapt based on your selection. Supported options include standard SMD sizes for ceramic capacitors (e.g., 0402, 0603, 0805), SMD sizes for aluminum electrolytic capacitors, and through-hole footprints for polarized capacitors. Save precious design time by seamlessly add more information to this part (value, footprint, etc.) as it becomes available. Standard capacitor values: 1.0pF 10pF 100pF 1000pF 0.01uF 0.1uF 1.0uF 10uF 100uF 1000uF 10,000uF 1.1pF 11pF 110pF 1100pF 1.2pF 12pF 120pF 1200pF 1.3pF 13pF 130pF 1300pF 1.5pF 15pF 150pF 1500pF 0.015uF 0.15uF 1.5uF 15uF 150uF 1500uF 1.6pF 16pF 160pF 1600pF 1.8pF 18pF 180pF 1800pF 2.0pF 20pF 200pF 2000pF 2.2pF 22pF 20pF 2200pF 0.022uF 0.22uF 2.2uF 22uF 220uF 2200uF 2.4pF 24pF 240pF 2400pF 2.7pF 27pF 270pF 2700pF 3.0pF 30pF 300pF 3000pF 3.3pF 33pF 330pF 3300pF 0.033uF 0.33uF 3.3uF 33uF 330uF 3300uF 3.6pF 36pF 360pF 3600pF 3.9pF 39pF 390pF 3900pF 4.3pF 43pF 430pF 4300pF 4.7pF 47pF 470pF 4700pF 0.047uF 0.47uF 4.7uF 47uF 470uF 4700uF 5.1pF 51pF 510pF 5100pF 5.6pF 56pF 560pF 5600pF 6.2pF 62pF 620pF 6200pF 6.8pF 68pF 680pF 6800pF 0.068uF 0.68uF 6.8uF 68uF 680uF 6800uF 7.5pF 75pF 750pF 7500pF 8.2pF 82pF 820pF 8200pF 9.1pF 91pF 910pF 9100pF #generics #CommonPartsLibrary
  • Generic Inductor
    A generic fixed inductor for rapid developing circuit topology. *You can now change the footprint and 3D model at the top level anytime you want. This is the power of #generics
  • Terminal
    Terminal
    An electrical connector acting as reusable interface to a conductor and creating a point where external circuits can be connected.
  • RMCF0805JT47K0
    47 kOhms ±5% 0.125W, 1/8W Chip Resistor 0805 (2012 Metric) Automotive AEC-Q200 Thick Film #forLedBlink
  • 875105359001
    10uF Capacitor Aluminum Polymer 20% 16V SMD 5x5.3mm #forLedBlink #commonpartslibrary #capacitor #aluminumpolymer #radialcan
  • CTL1206FYW1T
    Yellow 595nm LED Indication - Discrete 1.7V 1206 (3216 Metric) #forLedBlink

Inspect

[Multi-layer] JLCPCB Constraints

[Multi-layer] JLCPCB Constraints
Description

Created
Last updated by jharwinbarrozo
2 Contributor(s)
jharwinbarrozo
danieljoel

Controls

Properties

PCB Partition Annotations
1) Bluetooth Antenna Keep-out Zone: - Reserve at least a 15 mm clearance (no copper pour, no traces, no vias, no components) directly under and around the antenna portion of the Bluetooth module, extending in the main radiation direction toward the board edge. - Do not route high-speed, high-current, or clock traces beneath or immediately adjacent to the antenna area on any layer. - Maintain continuous, unbroken ground plane around (but not under) the antenna region to provide a stable RF reference; use a ground cut-out directly under the antenna as per module datasheet. - Keep metal objects, mounting holes, and shields outside the antenna keep-out outline. 2) Functional Partitions and Boundaries: - Define three primary PCB regions: (A) Analog Measurement Section (cuff pressure sensing, ADC front-end, transducer excitation), (B) Digital Section (MCU, Bluetooth, memory, digital interfaces), and (C) Power Section (AC/DC adapter input, DC/DC/switching regulators, pump/valve drivers). - Place the analog section farthest from the pump/valve drivers and switching regulators; place the Bluetooth module near a board edge for optimal RF performance and away from high-current loops. - Mark partition boundaries with silkscreen or mechanical layer outlines: "ANALOG", "DIGITAL", and "POWER". 3) Ground / Return-Path Segregation: - Use separate copper regions for AGND (analog ground), DGND (digital ground), and PGND (power/switching return) with a single-point star connection near the ADC/microcontroller ground reference. - Keep analog signal return paths confined to the AGND area, routed directly back to the star point without crossing digital or power current loops. - Keep high di/dt switching currents (DC/DC converter loops, pump/valve drivers) confined to the PGND region with tight, local loops and minimal loop area. - Do not route sensitive analog traces across splits in the ground plane; ensure continuous AGND plane directly beneath all low-level analog measurement traces. - If guard traces are used around high-impedance analog nodes, connect them to AGND only and keep them isolated from DGND/PGND. 4) Partition Crossing Rules: - Route analog-to-digital interface signals (e.g., ADC outputs, sensor SPI/I2C) across partition boundaries only at controlled, narrow corridors where AGND and DGND planes are joined at the star point. - Use series resistors and RC filters on boundary-crossing lines to reduce digital noise coupling into the analog domain. - Keep power supply transitions (e.g., from DC/DC outputs to analog LDO regulators) localized at the edge of the power and analog regions; place LDOs and filter components at the boundary to improve isolation. 5) EMC/EMI and Safety Considerations: - Maintain clear separation between mains-referenced circuitry in the external adapter and SELV, patient-connected circuitry on this PCB; no mains routing onto the medical PCB. - Orient digital and power return paths so that their loop areas do not overlap the Bluetooth antenna keep-out or the sensitive analog measurement region. - Reserve a continuous chassis/earth or shield reference area (if used) away from the antenna and analog front-end, with defined connection points to the system ground for controlled EMI behavior. 6) RF_50OHM Antenna Keep-out and Ground Stitching Corridor: - Maintain the existing antenna keep-out region for all RF_50OHM net routing: no copper pour, no non-RF traces, no vias, and no components within the defined antenna clearance area except those explicitly part of the RF matching network. - Ensure that RF_50OHM traces within the antenna region reference a continuous ground via a controlled stitching-via corridor located adjacent to (but not inside) the antenna no-copper zone. - Place ground stitching vias at a regular pitch (≤ 1/20 of the RF wavelength in FR-4 at the operating Bluetooth frequency) along the corridor to maintain a stable RF return and to confine RF currents near the RF_50OHM trace. - Do not interrupt the stitching-via corridor with splits in the ground plane, cutouts, or large signal/power vias; reroute non-RF nets to avoid breaking the RF reference ground path. - Keep any shields, metal enclosures, or large ground fills outside the defined antenna keep-out and ensure they connect via the stitching corridor so as not to detune the antenna. - Document the antenna keep-out outline and ground stitching corridor on a dedicated mechanical or keep-out layer, and lock these constraints so they are preserved across layout revisions. 7) Analog Measurement Front-end Annotation: - Near the pressure-sensing analog front-end placeholder, all ANALOG_MEAS nodes and traces must be clearly tagged and routed entirely within the analog partition. - ANALOG_MEAS traces must be routed in the analog partition over unbroken AGND (continuous analog ground plane), with no crossings over ground splits or returns from digital or power domains. - Maintain short, direct routes from the pressure transducer and front-end amplifier/ADC inputs to minimize loop area and noise pickup. - Any transition from ANALOG_MEAS to other domains must occur only at the defined analog boundary component (L1) and through the controlled analog-to-digital interface corridor at the star ground point.
India RoHS (Classic 6)
True
RF_50OHM Net Class
width 2.8 mm; clearance 6 mil; routing within the antenna keep-out area with reference to ground stitching via placement
Role
Isolation
BIS Registration (India)
True
IO_ESD Net Class
width 8 mil; clearance 8 mil; routing applied downstream of D2 and D3 and at J1
Pre-Compliance Checklist: RF Immunity
Radiated, conducted, EFT on DC, dips on DC
Pre-Compliance Checklist
ESD: ±8 kV contact, ±15 kV air; RF immunity: radiated, conducted, EFT on DC, dips on DC; isolation requirements for non-medical external ports.
WPC ETA for Bluetooth
True
Preferred Distributors
LCSC
Part Type
Home-use device classification
Power Requirements
Mains
POWER_SWITCH Net Class: width
40 mil
Domain
Medical
ANALOG_MEAS Net Class
width 6 mil; clearance 6 mil; traces must be routed in the analog partition over unbroken ground; boundary limited by L1
Pre-Compliance Checklist: ESD
±8 kV contact, ±15 kV air
Nets Assignment Documentation
Nets will be assigned later based on placeholder component tags (e.g., IO_ESD, ANALOG_MEAS, RF_50OHM, POWER_SWITCH) and the documented net class rules for width/clearance and partition boundaries. Current properties and annotations act as a scaffold for future net naming and connectivity once the full schematic is implemented.
Net Type
Analog
Pre-Compliance Checklist: Isolation Requirements
Isolation requirements for non-medical external ports (non-patient, non-mains).
Role Details
Medical-grade SELV adapter requirement for BF-classified, home-use BP monitor; external adapter must be BIS-registered and provide SELV-limited output for patient-connected circuitry.
POWER_SWITCH Net Class: clearance
12 mil
Compliance
RoHS
Board Thickness
1.6 mm
POWER_SWITCH Net Class
width 10 mil; clearance 10 mil; domain: Power Switching
POWER_SWITCH Nets
VIN, VIN_FILT

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