PCB Schematic Draft
Worked for 1 min 45 sec
U1 is now a 6-pin placeholder with no assumed pinout. I’m updating the part notes so the uncertainties stay visible instead of encoded as guessed values.
Worked for 4 mins 50 sec
Applied the microscope-inventory corrections: U1 is now a 6-pin placeholder, R6/C1-C3/D1-D3 are annotated as uncertain, and possible R5 is documented as a note only.
Open items:
- U1 pins are intentionally floating until trace mapping confirms pinout.
- R6, R7, C1-C3, D1-D3 type/polarity, and possible R5 still need measurement/confirmation.
- ERC still reports expected unresolved placeholder pins and missing MPNs for generic draft parts.
Updated files: Schematic Capture Notes and Project Specification.
Suggested next steps:
- Measure R6/R7 and C1-C3.
- Confirm D1-D3 with diode/LED test mode.
- Provide U1/U2 continuity maps so I can wire the placeholders correctly.
Clean notes and review
Arrange schematic groups
Create measurement checklist
Add photo map plan
Check BOM placeholders
Refine this doc
Ask about this doc
Schematic Capture Notes — NSS-Bridge-3
What Was Captured
- Added components with requested designators: U1, U2, B1, J1, L1, R1, R2, R3, R4, R6, R7, C1-C3, D1-D3, E1-E3, and RING contact.
- Replaced U1 with a 6-pin small-IC placeholder per microscope inventory correction.
- Created primary nets:
VBAT,GND,VSTIM,STIM_OUT1,STIM_OUT2,STIM_OUT3,RING. - Added internal placeholder nets
FB_DIV,STIM_DRV_A, andSTIM_DRV_Bto represent unresolved intermediate nodes.
Visible Open Questions / Do Not Guess
- U1 is a 6-pin small IC with marking
T18 AU8 2DZ; exact identity and pinout are unknown. - U2 is a placeholder 8-pin controller device; original marking
LBVC B041is not identified. - Placeholder IC pin names do not represent confirmed original pins.
- R1/R2 values are inferred from package markings and should be measured.
- R6 marking is ambiguous: it may be
103(10kΩ) or105(1MΩ). Verify by measurement before feedback/bias calculations. - R7 value is unknown and remains a placeholder property.
- C1-C3 values are unmeasured MLCCs; do not assume 100nF/1uF/10uF until measured.
- D1-D3 might be LEDs rather than rectifier/signal diodes; confirm diode vs LED and polarity before relying on the schematic.
- There may be an
R5on the silkscreen. This is only noted here; no R5 component has been added until confirmed. - J1 VBUS/D+/D-/ID are currently marked no-connect because the pasted brief did not define those nets.
Current ERC / Review Findings
- Expected floating pins remain on unresolved U1/U2 placeholder functions and R1/R2 because exact trace mapping is not yet known.
- U1 is intentionally left without assumed power/ground pins until the 6-pin device pinout is mapped.
- Manufacturing checks report missing MPNs for generic/passive/mechanical placeholders; this is expected for a reverse-engineering draft.
- The schematic is functionally captured enough to guide the next trace-mapping pass, but not safe or complete enough for layout/manufacture.
Recommended Next Reverse-Engineering Inputs
- High-resolution top and bottom photos with visible traces.
- Continuity map from U1/U2 pins to passives, inductor, pads, and electrodes.
- Measurements of R6, R7, and C1-C3.
- Diode/LED identification and polarity confirmation by meter or microscope orientation marks.
- Confirmation whether an R5 footprint exists on the PCB/silkscreen.
- Whether J1 VBUS/data pins connect to any circuitry.
What Was Captured
Visible Open Questions / Do Not Guess
Current ERC / Review Findings
Recommended Next Reverse-Engineering Inputs
